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參數(shù)資料
| 型號(hào)： | V55C2256164VGLK-10H |
| 廠商： | PROMOS TECHNOLOGIES INC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | SYNCHRONOUS DRAM, PBGA54 |
| 封裝： | 8 X 10 MM, GREEN, MO-210, FBGA-54 |
| 文件頁(yè)數(shù)： | 9/47頁(yè) |
| 文件大?。?/td> | 581K |
| 代理商： | V55C2256164VGLK-10H |
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V55C2256164VG Rev. 1.0 September 2008
ProMOS TECHNOLOGIES
V55C2256164VG
Timing Diagrams
1. Bank Activate Command Cycle
2. Burst Read Operation
3. Read Interrupted by a Read
4. Read to Write Interval
4.1 Read to Write Interval
4.2 Minimum Read to Write Interval
4.3 Non-Minimum Read to Write Interval
5. Burst Write Operation
6. Write and Read Interrupt
6.1 Write Interrupted by a Write
6.2 Write Interrupted by Read
7. Burst Write & Read with Auto-Precharge
7.1 Burst Write with Auto-Precharge
7.2 Burst Read with Auto-Precharge
8. Burst Termination
8.1 Termination of a Burst Write Operation
8.2 Termination of a Burst Write Operation
9. AC- Parameters
9.1 AC Parameters for a Write Timing
9.2 AC Parameters for a Read Timing
10. Mode Register Set
11. Power on Sequence and Auto Refresh (CBR)
12. Power Down Mode
13. Self Refresh (Entry and Exit)
14. Auto Refresh (CBR)
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