參數(shù)資料
型號: V54C3256804VBS7
廠商: PROMOS TECHNOLOGIES INC
元件分類: DRAM
英文描述: 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PBGA60
封裝: MO-210, FBGA-60
文件頁數(shù): 18/50頁
文件大?。?/td> 728K
代理商: V54C3256804VBS7
25
V54C3256(16/80/40)4VB Rev. 1.0 December 2003
ProMOS TECHNOLOGIES
V54C3256(16/80/40)4VB
6.2 Write Interrupted by a Read
(Burst Length = 4, CAS latency = 2, 3)
7. Burst Write with Auto-Precharge
Burst Length = 2, CAS latency = 2, 3)
COMMAND
NOP
WRITE A
READ B
NOP
tCK2, I/O’s
CAS latency = 2
DIN A0
tCK3, I/O’s
CAS latency = 3
DIN A0
CLK
T0
T2
T1
T3
T4
T5
T6
T7
T8
DOUT B3
DOUT B0
DOUT B1
DOUT B2
DOUT B3
don’t care
DOUT B0
DOUT B1
DOUT B2
Input data must be removed from the I/O’s at least one clock
cycle before the Read dataAPpears on the outputs to avoid
data contention.
COMMAND
NOP
WRITE A
Auto-Precharge
CLK
T0
T2
T1
T3
T4
T5
T6
T7
T8
NOP
BANK A
ACTIVE
NOP
DIN A0
DIN A1
I/O’s
Begin Autoprecharge
Bank can be reactivated after trp
*
t WR
tRP
NOP
*
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