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參數(shù)資料
| 型號： | UPD78C12AGF |
| 廠商： | NEC Corp. |
| 英文描述： | AC Series Door Switch, Single Pole Double Throw Circuitry, 5 A at 250 Vac, Rod Actuator, Silver Contacts, Quick Connect Termination |
| 中文描述： | 8位單片機與A / D轉(zhuǎn)換 |
| 文件頁數(shù)： | 38/66頁 |
| 文件大?。?/td> | 3252K |
| 代理商： | UPD78C12AGF |
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38
μ
PD78C10A,78C11A,78C12A
DC CHARACTERISTICS
(T
A
= –40 to +85
°
C, V
DD
= AV
DD
= +5.0 V
±
10 %, V
SS
= AV
SS
= 0 V)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
All except RESET, STOP, NMI,
SCK, INT1, TI, AN4 to AN7
RESET, STOP, NMI, SCK, INT1,
TI, AN4 to AN7
All except RESET, STOP, NMI,
SCK, INT1, TI, AN4 to AN7, X1, X2
RESET, STOP, NMI, SCK, INT1,
TI, AN4 to AN7, X1, X2
Output voltage low
V
OL
I
OL
= 2.0 mA
0.45
V
V
DD
–1.0
V
V
DD
–0.5
V
Input current
I
I
INT1
*1
, TI(PC3)
*2
; 0 V
≤
V
I
≤
V
DD
±
200
μ
A
All except INT1, TI (PC3),
0 V
≤
V
I
≤
V
DD
±
10
μ
A
Output leakage
current
±
10
μ
A
AI
DD1
Operating mode f
XX
= 15 MHz
0.5
1.3
mA
AI
DD2
STOP mode
10
20
μ
A
I
DD1
Operating mode f
XX
= 15 MHz
13
25
mA
I
DD2
HALT mode f
XX
= 15 MHz
7
13
mA
Data retention
voltage
Hardware/software STOP mode
2.5
V
Hardware/software
*3
V
DDDR
= 2.5 V
1
15
μ
A
STOP mode
V
DDDR
= 5 V
±
10%
10
50
μ
A
Pull-up resistor
*4
Ports A, B and C
3.5 V
≤
V
DD
≤
5.5 V,
V
I
= 0 V
17
27
75
k
Caution
For a detailed description of the hardware STOP mode, refer to the 87AD Series mPD78C18 User's
Manual.
1.
If self-bias should be generated by ZCM register.
2.
If the control mode is set by MCC register, and self-bias should be generated by ZCM register.
3.
If self-bias is not generated.
4.
μ
PD78C11A and 78C12A only.
*
Input voltage low
Input voltage
high
Output voltage
high
Input leakage
current
AV
DD
power
supply current
V
DD
power
supply current
Data retention
current
V
IL2
I
LI
I
LO
V
IL1
V
1IH
V
IH2
V
OH
0 V
≤
V
O
≤
V
DD
R
L
I
DDDR
V
DDDR
0
0.2 V
DD
V
0
0.8
V
2.2
V
DD
V
I
OH
= –1.0 mA
I
OH
= –100
μ
A
0.8 V
DD
V
DD
V
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