參數(shù)資料
型號(hào)： UPD78C12AGF
廠(chǎng)商： NEC Corp.
英文描述： AC Series Door Switch, Single Pole Double Throw Circuitry, 5 A at 250 Vac, Rod Actuator, Silver Contacts, Quick Connect Termination
中文描述： 8位單片機(jī)與A / D轉(zhuǎn)換
文件頁(yè)數(shù)： 20/66頁(yè)
文件大?。?/td> 3252K
代理商： UPD78C12AGF
20
μ
PD78C10A,78C11A,78C12A
Identifier
Description
r
r1
r2
V, A, B, C, D, E, H, L
EAH, EAL, B, C, D, E, H, L
A, B, C
sr
PA, PB, PC, PD, PF, MKH, MKL, ANM, SMH, SML, EOM, ETMM, TMM, MM, MCC, MA, MB, MC, MF,
TXB, TM0, TM1, ZCM
PA, PB, PC, PD, PF, MKH, MKL, ANM, SMH, EOM, TMM, RXB, CR0, CR1, CR2, CR3
PA, PB, PC, PD, PF, MKH, MKL, ANM, SMH, EOM, TMM
ETM0, ETM1
ECNT, ECPT
sr1
sr2
sr3
sr4
rp
rp1
rp2
rp3
SP, B, D, H
V, B, D, H, EA
SP, B, D, H, EA
B, D, H
rpa
rpa1
rpa2
rpa3
B, D, H, D+, H+, D–, H–
B, D, H
B, D, H, D+, H+, D–, H–, D+byte, H+A, H+B, H+EA, H+byte
D, H, D++, H++, D+byte, H+A, H+B, H+EA, H+byte
wa
8 bit immediate data
word
byte
bit
16 bit immediate data
8 bit immediate data
3 bit immediate data
f
CY, HC, Z
irf
NMI
*
, FT0, FT1, F1, F2, FE0, FE1, FEIN, FAD, FSR, FST, ER, OV, AN4, AN5, AN6, AN7, SB
Remarks
1. sr to sr4 (special register)
2. rp to rp3 (register pair)
4. f (flag)
PA
PB
PC
PD
PF
MA
MB
MC
MCC
MF
MM
TM0
TM1
TMM
ETM0 :
:
:
:
:
:
:
:
:
:
:
:
:
:
:
PORT A
PORT B
PORT C
PORT D
PORT F
MODE A
MODE B
MODE C
MODE CONTROL C
MODE F
MEMORY MAPPING
TIMER REG0
TIMER REG1
TIMER MODE
TIMER/EVENT
COUNTER REG0
TIMER/EVENT
COUNTER REG1
TIMER/EVENT
COUNTER UPCOUNTER
TIMER/EVENT
COUNTER CAPTURE
ETMM :
TIMER/EVENT
COUNTER MODE
TIMER/EVENT
COUNTER OUTPUT
MODE
A/D CHANNEL MODE
A/D CONVERSION
RESULT 0 to 3
EOM
:
ANM
CR0
to
CR3
TXB
RXB
SMH
SML
MKH
MKL
ZCM
:
:
:
:
:
:
:
:
:
T
X
BUFFER
R
X
BUFFER
SERIAL MODE High
SERIAL MODE Low
MASK High
MASK Low
ZERO CROSS MODE
ETM1 :
ECNT
:
ECPT
:
SP
B
D
H
V
EA
:
:
:
:
:
:
STACK POINTER
BC
DE
HL
VA
EXTENDED
ACCUMULATOR
3. rpa to rpa3 (rp addressing)
B
D
H
D+
H+
D–
H–
D++
H++
D + byte :
H + A
H + B
H + EA
H + byte :
:
:
:
:
:
:
:
:
:
(BC)
(DE)
(HL)
(DE)+
(HL)+
(DE)–
(HL)–
(DE)++
(HL)++
(DE + byte)
(HL + A)
(HL + B)
(HL + EA)
(HL + byte)
:
:
:
NMI
FT0
FT1
F1
F2
FE0
FE1
FEIN
FAD
FSR
FST
ER
OV
AN4
to
AN7
SB
:
:
:
:
:
:
:
:
:
:
:
:
:
:
NMI INPUT
INTFT0
INTFT1
INTF1
INTF2
INTFE0
INTFE1
INTFEIN
INTFAD
INTFSR
INTFST
ERROR
OVERFLOW
ANALOG INPUT 4 to 7
:
STANDBY
CY
HC
Z
:
:
:
CARRY
HALF CARRY
ZERO
5. irf (interrupt flag)
4.
INSTRUCTION SET
4.1
IDENTIFIER/DESCRIPTION OF OPERAND
*
NMI can also be described as FNMI.
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