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參數(shù)資料
| 型號(hào)： | UPD78218AGC |
| 廠商： | NEC Corp. |
| 元件分類(lèi)： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁(yè)數(shù)： | 30/66頁(yè) |
| 文件大?。?/td> | 510K |
| 代理商： | UPD78218AGC |
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30
μ
PD78217A, 78218A
4.1.2
Vectored Interrupt
The memory contents of the vector table address, which corresponds to the interrupt source, is branched into
the service routine as a destination address.
As the CPU executes the interrupt servicing, the following operations occur.
When branch :
When return
Saving the CPU status (PC, PSW contents) to the stack.
Returning the CPU status (PC, PSW contents) from the stack.
:
The RETI instruction executes returning to the main routine from the service routine.
Table 4-3 Vector Table Address
Interrupt Source
INTC21
INTP4
INTC30
INTP5
INTAD
INTC20
INTSER
INTSR
INTST
INTCSI
BRK
NMI
INTP0
INTP1
INTP2
INTP3
INTC00
INTC01
INTC10
INTC11
4.1.3
Macro Service
This is a function to transfer data between the memory and special function registers (SFR) without going through
the CPU. The macro service controller accesses the memory and SFR, and transfers data directly without fetching
it.
High-speed data transfer is enabled because no data is saved, restored or fetched.
Fig. 4-3 Macro Service
003EH
0002H
0006H
0008H
000AH
000CH
0014H
0016H
0018H
001AH
Vector Table
Address
Interrupt Source
Vector Table
Address
001CH
000EH
0010H
0012H
0020H
0022H
0024H
0026H
CPU
Memory
SFR
Macro Service
Controller
Internal Bus
Read
Write
Read
Write
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