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參數(shù)資料
| 型號： | UPD78218AGC |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁數(shù)： | 10/66頁 |
| 文件大?。?/td> | 510K |
| 代理商： | UPD78218AGC |
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1
μ
P
Part Number
Minimum instruction execution
time (at 12-MHz)
PUSH PSW instruction execution
time (number of clocks)
Power voltage range
On-chip memory
I/O pins
16-bit timer/counter one-shot
pulse output
Macro service counter bit width
Macro service type C MPD, MPT
increments
Macro service execution time
Restrictions when data is
transferred from macro service
type A memory to SFR
A/D converter
Stabilization time for oscillation
in STOP mode release
Package
μ
PD78214 Subseries
μ
PD78212
μ
PD78213
μ
PD78214
μ
PD78P214
333 ns
500 ns
333 ns
When stack area is an internal dual port RAM
Other than above
: 5 or 7
: 7 or 9
V
DD
=+5V
±
10%
8 Kbytes
(mask ROM)
ROM-less
16 Kbytes
(mask ROM)
16 Kbytes
(PROM)
384 bytes
512 bytes
54
36
54
Not available
NMI active pulse width + dedicated counter 16 bits
64-pin plastic shrink DIP (750 mil)
64-pin plastic QUIP: Except
μ
PD78212
68-pin plastic QFJ: Except
μ
PD78212
64-pin plastic QFP (14 x 14 mm)
74-pin plastic QFP (20 x 20 mm)
64-pin ceramic shrink DIP
(CERDIP, with window, 750 mil):
μ
PD78P214 only
8/16 bits select capability (except type A)
16-bit increment
Input voltage
restrictions
AV
REF
voltage
restrictions
1
D
μ
P
μ
P
Macro service depends on mode. Compare with user’s manual of products.
Generated when transfer source buffer (memory) address is
0FED0H to 0FEDFH.
Only pins involved in A/D conversion
3.6 V to V
DD
Dedicated counter 15 bits or NMI active pulse width + dedi-
cated counter 16 bits
64-pin plastic shrink DIP (750 mil)
64-pin plastic QFP (14 x 14 mm)
64-pin ceramic shrink DIP
(CERDIP, with window, 750 mil):
μ
PD78P218A only
Only 8 bits
Only low-order 8 bits increment
(high-order 8 bits are unchanged)
Generated when transfer data is in D0H to DFH.
Pins involved in A/D conversion and pins selected by ADM
register bits ANI0 to ANI2 only: 0V to AV
REF
pin voltage
3.4 V to V
DD
Series Name
Available
μ
PD78218A Subseries
μ
PD78217A
μ
PD78218A
μ
PD78P218A
500 ns
333 ns
When stack area is an internal dual port RAM
Other than above
: 6
: 8
V
DD
=+5V
±
10%
V
DD
=+5V
±
0.3V
ROM-less
32 Kbytes
(mask ROM)
32 Kbytes
(PROM)
1024 bytes
36
54
ROM
RAM
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