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參數(shù)資料
| 型號： | UPD4990AG |
| 廠商： | NEC Corp. |
| 英文描述： | SERIAL I/O CALENDAR & CLOCK CMOS LSI |
| 中文描述： | 串行I / O日歷 |
| 文件頁數(shù)： | 6/20頁 |
| 文件大小： | 129K |
| 代理商： | UPD4990AG |
μ
PD4990A
6
COMMAND SPECIFICATIONS
°
Shift register 40 bit (The year function is ineffective.)
(Operates as the existing
μ
PD1990AC in other than test mode)
Commands input from C
0
, C
1
, and C
2
pins (1 ...H, 0 ...L)
C
2
C
1
C
0
FUNCTION
0
0
0
Register Hold
DATA OUT = 1 Hz
0
0
1
Register Shift
DATA OUT = [LSB] = 0 or 1
0
1
0
Time Set & Counter Hold
DATA OUT = [LSB] = 0 or 1
0
1
1
Time Read
DATA OUT = 1 Hz
1
0
0
TP = 64 Hz
1
0
1
TP = 256 Hz
1
1
0
TP = 2 048 Hz
1
1
1
Serial command transfer mode
* The test mode is cancelled by [C2, C1, C0] = [0, 0, 0] to [1, 1, 0].
°
Serial data commands
Set [C
2
, C
1
, C
0
] = [1, 1, 1] at all time.
Shift register 52 bit (The year function is effective.)
C
3
'
C
2
'
C
1
'
C
0
'
FUNCTION
0
0
0
0
Register Hold
DATA OUT = 1 Hz
0
0
0
1
Register Shift
DATA OUT = [LSB] = 0 or 1
0
0
1
0
Time Set & Counter Hold
DATA OUT = [LSB] = 0 or 1
0
0
1
1
Time Read
DATA OUT = 1 Hz
0
1
0
0
TP = 64 Hz
0
1
0
1
TP = 256 Hz
0
1
1
0
TP = 2 048 Hz
0
1
1
1
TP = 4 096 Hz
1
0
0
0
TP = 1 s interval set (counter reset & start)
1
0
0
1
TP = 10 s interval set (counter reset & start)
1
0
1
0
TP = 30 s interval set (counter reset & start)
1
0
1
1
TP = 60 s interval set (counter reset & start)
1
1
0
0
Interval Output Flag Reset
1
1
0
1
Interval Timer Clock Run
1
1
1
0
Interval Timer Clock Stop
1
1
1
1
TEST MODE SET
When serial data commands are used, C
0
, C
1
, and C
2
pins should be connected V
DD
pin.
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