參數(shù)資料
型號： UPD4990AC-A
元件分類： 時鐘/數(shù)據(jù)恢復及定時提取
英文描述： 0 TIMER(S), REAL TIME CLOCK, PDIP14
封裝： DIP-14
文件頁數(shù)： 13/51頁
文件大?。?/td> 211K
代理商： UPD4990AC-A
15
CHAPTER 2 FUNCTION SPECIFICATION
(4) TIME READ COMMAND (C3’, C2’, C1’, C0’ = 0, 0, 1, 1)
Data of time counter is transferred to 48 bit shift register. Data of shift register is fixed after next command
is read. After this command is read. 48 bit shift register is held. 1 Hz appeares to DATA OUT.
DATA IN
48 bit Shift Register
D
Disable shift
Time Counter
Data of time counter is transferred
to 48 bit shift register.
Divider
32 kHz
1 Hz
DATA OUT
1 Hz
Data of 48 bit shift register isn't shifted.
Command
Register
D
CK
CLK
Time counter continues to count up.
(5) TIMING PULSE CONTROL COMMAND
It can be selected TP frequency. 64 Hz, 256 Hz, 2048 Hz, or 4096 Hz appeares to TP.
Table 2-4 Timing Pulse Control Command
Command name
Function
C3’, C2’, C1’, C0’
TP64
Output of 64 Hz timing pulse
0, 1, 0, 0
TP256
Output of 256 Hz timing pulse
0, 1, 0, 1
TP2048
Output of 2048 Hz timing pulse
0, 1, 1, 0
TP4096
Output of 4096 Hz timing pulse
0, 1, 1, 1
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