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參數(shù)資料
| 型號(hào)： | UPD30181AYF1-131-GA3 |
| 廠商： | NEC Corp. |
| 英文描述： | 64-/32-BIT MICROPROCESSOR |
| 中文描述： | 64-/32-BIT微處理器 |
| 文件頁數(shù)： | 11/72頁 |
| 文件大?。?/td> | 447K |
| 代理商： | UPD30181AYF1-131-GA3 |
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Data Sheet U16277EJ1V0DS
11
μ
PD30181A, 30181AY
(2/3)
Signal Name
I/O
Function
Alternate Function
MEMWR#
O
System bus memory write
This pin becomes active when the V
R
4181A writes to any of the following
devices.
ROM, flash memory, SRAM, or general-purpose devices controlled by
the ROMCS# pin or PCS# pin
External ISA bus memory space devices and CompactFlash/PC Card
memory space devices
–
IORD#
O
System bus I/O read
This pin becomes active when the V
R
4181A reads data from the external
ISA bus I/O space devices or CompactFlash/PC Card I/O ports. It is
valid only when accessing the external ISA bus I/O space.
–
IOWR#
O
System bus I/O write
This pin becomes active when the V
R
4181A writes data to external ISA
bus I/O space devices or CompactFlash/PC Card I/O ports. It is valid
only when accessing the external ISA bus I/O space.
–
IORDY
I
System bus I/O channel ready
This pin (IORDY) is set as inactive in relation to read/write strobes from
the V
R
4181A in order to extend the access time for a device connected to
the system bus. It is set as active once the device is in a mode that
supports access from the V
R
4181A. It can be used to access a device
connected to the ROMCS# pin or PCS# pin or a device connected to the
external ISA space.
–
IOCS16#
I
System bus sizing request
Set this signal as active when an ISA device connected to the system
bus accesses data in 16-bit width. Bus sizing that uses this pin IOCS16#
is enabled only when accessing the external ISA space.
–
UBE#
O
System bus higher byte enable
This pin becomes active during system bus access if the higher bytes of
the 16-bit data bus are valid. It can be used if a device connected to the
ROMCS# or PCS# pin or a device connected to the external ISA space
uses 16-bit width.
–
LBE(3:0)#
O
System bus byte enable
The LBE(3:0)# signal pins used for 32-bit general-purpose devices are
shared as the DQM(3:0) signal pins for SDRAM and SyncFlash memory,
so the function of this pin changes based on time division. When the
V
R
4181A accesses a device that uses the ROMCS# pin or PCS# pin, the
LBE(3:0)# signals become valid only when the SYSEN# signal is at low
level. This signal indicates the data bus’s valid byte lane. If the device
connected to the ROMCS# pin or PCS# pin has 32-bit width, this pin can
be used. When the SYSEN# pin is at high level, this pin operates as the
DQM(3:0) pins that are referenced by SDRAM.
DQM(3:0)
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| UPD30181AYF1-131-GA3-A | 64-/32-BIT MICROPROCESSOR |
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| UPD30181GM-66-8ED | 制造商:NEC 制造商全稱:NEC 功能描述:64-/32-Bit Microprocessor |
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