參數(shù)資料
型號: UD61466DC07
英文描述: AC LINE SWITCH
中文描述: x4靜態(tài)列模式DRAM
文件頁數(shù): 7/14頁
文件大?。?/td> 175K
代理商: UD61466DC07
December 12, 1997
7
UD61464
p
FPM Read-Write
FPM Cycle Time
t
PC
t
c(PG)RW
95
100
ns
Access Time from CAS Precharge
t
CPA
t
a(CASH)
35
40
ns
p
HIDDEN REFRESH
CAS Hold Time (CAS before RAS Cycle)
t
CHR
t
RASL-CASH
15
15
ns
Remark: see below
Dynamic Characteristics
3)
Symbol
Min.
Max.
Unit
Alt.
IEC
DC07
DC08
DC07
DC08
Remarks:
1)
The Input Low Voltage must not
drop below -0.3 V for more than
40 ns.
1a)
The total sum of the absolute
values of output currents must
not exceed 100 mA in case of
static application.
2)
The current is inversely propor-
tional to the cycle time; the max.
current is measured in the shor-
test cycle time.
3)
For test conditions see test confi-
guration for functional test and
clock timing.
4)
V
and V
are reference
levels for time measurement of
the input signals; transition times
are measured between V
IH
and
V
IL
.
5)
t
and t
define the time at
which the data output goes to
High-Z; this time is not related to
any level.
6)
t
and t
are given
as reference points only; they do
not represent restrictive conditi-
ons.
7)
The values of t
, t
and
t
cRWmin
are used for indication of
the particular cycle time in which
full function is guaranteed in the
temperature range from 0 to
70
°
C. Values below the one
shown above may cause perma-
nent damage to the component.
8)
Measured with a load equivalent
to 2 TTL loads, 100 pF.
9)
In Read cycle either t
h(RAS-R)
or
t
h(CAS-R)
must be kept.
10)
t
h(RASH-CA)
is only required if the
valid data are to be held beyond
the rising edge of RAS.
11)
t
su(W-CAS)
, t
RAS-W
, t
CAS-W
and
t
(CA-W)RW
do
restrictive parameters:
not
represent
- if t
su(W-CAS)
t
su(W-CAS)min
and
t
h(CASH-W)
t
h(CASH-W)min
, the
cycle is a Write cycle (CAS-con-
trolled), and the data output
remains in High-Z throughout the
whole CAS cycle,
- if t
CAS-W
> t
CAS-Wmin
, t
RAS-W
> t
RAS-Wmin
and t
(CA-W)RW
> t
(CA-
W)RWmin
, the cycle is a Read-
Write cycle, and the content of
the cell is available at the data
output,
- if none of these conditions is
satisfied, the condition of the
data output (at access time) is
indeterminate, since a Write
cycle (W-controlled) is carried
out.
12)
These parameters refer to CAS
during Write (CAS-controlled),
and to W (W-controlled) or to W
during Read-Write.
14)
t
su(W-CAS)
, t
RAS-W
, t
CAS-W
and t
(CA-
W)RW
do not represent restrictive
parameters:
- if t
su(W-CAS)
t
su(W-CAS)min
the
cycle is a Write cycle (CAS-con-
trolled) and the data output
remains in High-Z throughout the
whole CAS cycle,
- if t
CAS-W
> t
CAS-Wmin
, t
RAS-W
> t
RAS-Wmin
and t
(CA-W)RW
> t
(CA-
W)RWmin
, the cycle is a Read-
Write cycle, and the content of
the cell is available at the data
output,
- if none of these conditions is
satisfied, the condition of the
data output (at access time) is
indeterminate, since a Write
cycle (W-controlled) is carried
out.
相關(guān)PDF資料
PDF描述
UD61466DC08 THREE LINES AC SWITCH ARRAY
UDN7180A High temperature 10 A Triacs
UDS3611H883 5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
UDS3612H883 5.0 or 3.0V, 512 Bit (64 Bit x8) Serial RTC (SPI) SRAM and NVRAM Supervisor
UDS3613H883 Serial real-time clock
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UD61466DC08 制造商:ZMD 制造商全稱:Zentrum Mikroelektronik Dresden AG 功能描述:64K x 4 DRAM
UD-6-50N-302 制造商:ITT Interconnect Solutions 功能描述:UD-6-50N-302 - Bulk
UD6-52N-302 制造商:ITT Interconnect Solutions 功能描述:UD6-52N-302 - Bulk
UD6KBA80-7000 功能描述:橋式整流器 Bridge Diode RoHS:否 制造商:Vishay 產(chǎn)品:Single Phase Bridge 峰值反向電壓:1000 V 最大 RMS 反向電壓: 正向連續(xù)電流:4.5 A 最大浪涌電流:450 A 正向電壓下降:1 V 最大反向漏泄電流:10 uA 功率耗散: 最大工作溫度:+ 150 C 長度:30.3 mm 寬度:4.1 mm 高度:20.3 mm 安裝風(fēng)格:Through Hole 封裝 / 箱體:SIP-4 封裝:Tube
UD7018 制造商:XINDEYI 制造商全稱:XINDEYI 功能描述:N-Ch 75V Fast Switching MOSFETs