參數(shù)資料
型號(hào): UD61466DC07
英文描述: AC LINE SWITCH
中文描述: x4靜態(tài)列模式DRAM
文件頁(yè)數(shù): 2/14頁(yè)
文件大小: 175K
代理商: UD61466DC07
December 12, 1997
2
UD61464
*)
Row
Decoder
Row
Decoder
Operation
Function
RAS
CAS
W
Address
G
Data
R
C
Stand-by
H
X
X
X
X
X
High-Z
Read
L
L
H
Row
Column
L
Output
Data
Write
L
L
L
Row
Column
X
Input Data
Read-Write
L
L
H
L
Row
Column
L
H
Output
Data/Input
Data
Output
Data
Output
Data
FPM
Read
1st
cycle
2nd
cycle
1st
cycle
2nd
cycle
L
H
L
H
Row
Column
L
L
H
L
H
Column
L
FPM
Write
L
H
L
L
Row
Column
X
Input Data
L
H
L
L
Column
X
Input Data
FPM
Read-Write
1st
cycle
L
H
L
H
L
Row
Column
L
H
Output
Data/Input
Data
Output
Data/Input
Data
2nd
cycle
L
H
L
H
L
Column
L
H
RAS only Refresh
L
H
X
Row
X
High-Z
HIDDEN Refresh
Read L
H
L
L
H
Row
Column
L
Output
Data
Write
L
H
L
L
L
Row
Column
X
Input Data
*) Transfer of Refresh Address required
Block Diagram
V
CC
V
SS
A0
A1
A2
A3
A4
A5
A6
A7
Clock Generator
M
U
X
1
S
1
S
C
A
4 Write-Read-Amplifiers
Write-Read-Control
Output Control
Data Input and
Output Amplifier
DQ0
DQ1
DQ2
DQ3
G
CAS
W
RAS
A0X to A7X
A0Y to A7Y
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