參數(shù)資料
型號: UAA3535
廠商: NXP Semiconductors N.V.
英文描述: Low power GSM/DCS/PCS multi-band transceiver
中文描述: 低功耗的GSM / DCS / PCS的多波段收發(fā)器
文件頁數(shù): 9/24頁
文件大?。?/td> 118K
代理商: UAA3535
2
9
P
O
L
U
Table 11
Register bit allocation; notes 1 and 2 and 3
Notes
1.
2.
3.
The 15-bit RF divider is programmable through the 15 bits RF0 to RF14, in steps of 100 kHz.
X = don’t care.
The 6-bit AGC attenuator is programmable through the 6 bits G0 to G5 in 17 steps of 4 dB (see Table 13).
Table 12
Preset values; note 1
Note
1.
X = don’t care.
REGISTER ALLOCATION
DATA FIELD
ADDRESS
FIELD
BIT
16
BIT
15
BIT
14
BIT
13
BIT
12
BIT
11
BIT
10
BIT
9
BIT
8
BIT
7
BIT
6
BIT
5
BIT
4
BIT
3
BIT
2
BIT
1
BIT
0
LAST 4 BITS
X
X
RF
14
X
X
RF
13
X
0
RF
12
X
FILT
RF
11
0
REF
DIV
RF
10
0
IFO
RF
9
0
IF
DIV
RF
8
0
TXI
RF
7
0
SBD
RF
6
LNA
BND
RF
5
G5
1
RF
4
G4
1
RF
3
G3
TXIF
ON
RF
2
G2
SYN
ON
RF
1
G1
RX
ON
RF
0
G0
TX
ON
0
0
1
1
X
X
X
X
0
0
0
0
1
0
0
1
for test purpose only; bit usage to be defined; this is a forbidden address
0
0
0
0
REGISTER ALLOCATION
DATA FIELD
ADDRESS
FIELD
BIT
16
BIT
15
BIT
14
BIT
13
BIT
12
BIT
11
BIT
10
BIT
9
BIT
8
BIT
7
BIT
6
BIT
5
BIT
4
BIT
3
BIT
2
BIT
1
BIT
0
LAST 4 BITS
X
X
X
X
X
X
1
X
X
0
X
0
0
X
0
1
0
0
0
0
1
1
0
1
0
0
0
0
0
1
0
1
0
0
1
1
0
1
1
0
1
0
1
1
0
1
1
0
0
1
0
0
0
0
0
0
0
0
0
1
1
0
0
1
0
1
0
for test purpose only; bit usage to be defined; this is a forbidden address
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