參數(shù)資料
型號(hào): TPU3035
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
英文描述: CONNECTOR ACCESSORY
中文描述: 連接器附件
文件頁數(shù): 24/73頁
文件大小: 1183K
代理商: TPU3035
PRELIMINARY DATA SHEET
TPU 3035, TPU 3040
MICRONAS INTERMETALL
24
4.2. I
2
C Bus Interface
Communication between TPU 3040 and host controller
is done via I
2
C-bus. For detailed information on the I
2
C-
bus please refer to the Philips manual ‘I
2
C-bus Specifi-
cation’.
The TPU 3040 acts as a slave transmitter/receiver and
uses clock synchronization to slow down the data trans-
fer if necessary. General call address will not be ac-
knowledged.
Different memories and functions of TPU 3040 can be
accessed by subaddressing. The byte following the
slave address byte is defined as the subaddress byte.
Maximum length of an I
2
C telegram is 256 bytes follow-
ing slave address and subaddress byte. The interface
supports data transfer with autoincrement.
The I
2
C-bus interface is interrupt-driven and uses an in-
ternal 48-byte buffer to collect I
2
C data in real-time with-
out disturbing internal processes. This is done to avoid
clock synchronization as far as possible. When the TPU
3040 has to process the I
2
C buffer and the I
2
C telegram
has not yet been stopped, the I
2
C clock line will be held
down.
The time required to process the I
2
C buffer depends on
other processes running inside the TPU 3040 firmware.
Thus the following I
2
C telegram addressing the TPU can
be held after the slave address byte until the old tele-
gram is completely processed.
4.2.1. Subaddressing
Access to all memory locations and to the command in-
terface is achieved by subaddressing. Both the external
DRAM and the internal CPU memory can be addressed
completely. The TPU 3040 acknowledges 6 different
subaddresses following the slave address (see Table
4–2).
The following symbols are used to describe the I
2
C ex-
ample telegrams:
<
>
ab
ah
al
cc
dd
ss
..
start condition
stop condition
address bank byte
address high byte
address low byte
command byte
data byte
status byte
0 – n continuation bytes
Table 4–2:
I
2
C-bus Subaddresses
Name
Binary Value
Hex Value
Mode
Function
TPU
0010 001x
22, 23
W, R
TPU slave address
Sub 1
0111 1000
78
W
subaddressing CPU (static)
Sub 2
0111 1001
79
W
subaddressing CPU (autoincrement)
Sub 3
0111 1010
7A
W
subaddressing DRAM (autoincrement)
Sub 4
0111 1011
7B
W
subaddressing command language
Data
0111 1100
7C
R/W
subaddressing data register
Status
0111 1101
7D
R
status register
bit 7 = command wait
bit 6 = command invalid
bit 5 = command found no data
bit 4 = not used
bit 3 = not used
bit 2 = not used
bit 1 = 0
bit 0 = 0
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