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| 型號(hào)： | TPS796xxyyyz |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | ULTRALOW-NOISE, HIGH PSRR, FAST, RF, 1A LOW-DROPOUT LINEAR REGULATORS |
| 中文描述： | 超低噪聲，高PSRR，快速，射頻低壓差線性穩(wěn)壓器1A條 |
| 文件頁(yè)數(shù)： | 8/33頁(yè) |
| 文件大?。?/td> | 899K |
| 代理商： | TPS796XXYYYZ |
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APPLICATION INFORMATION
Board Layout Recommendation to Improve
PSRR and Noise Performance
To improve ac measurements like PSRR, output
noise, and transient response, it is recommended
that the board be designed with separate ground
planes for V
and V
, with each ground plane
connected only at the ground pin of the device. In
addition, the ground connection for the bypass
capacitor should connect directly to the ground pin of
the device.
GND
EN
NR
IN
OUT
V
IN
V
OUT
0.01
μ
F
TPS796xx
2.2
μ
F
1
μ
F
External Capacitor Requirements
Although not required, it is good analog design
practice to place a 0.1
μ
F — 2.2
μ
F capacitor near the
input of the regulator to counteract reactive input
sources. A 2.2
μ
F or larger ceramic input bypass
capacitor, connected between IN and GND and
located close to the TPS796xx, is required for
stability and improves transient response, noise
rejection, and ripple rejection. A higher-value input
capacitor may be necessary if large, fast-rise-time
load transients are anticipated and the device is
located several inches from the power source.
Regulator Mounting
The tab of the SOT223-6 package is electrically
connected to ground. For best thermal performance,
the tab of the surface-mount version should be
soldered directly to a circuit-board copper area.
Increasing
the
copper
dissipation.
Programming the TPS79601 Adjustable LDO
Regulator
The output voltage of the TPS79601 adjustable
regulator is programmed using an external resistor
divider as shown in
Figure 28
. The output voltage is
calculated using
Equation 1
:
V
OUT
V
REF
1
R1
R2
(1)
TPS796xx
SLVS351I–SEPTEMBER 2002–REVISED MAY 2006
The
regulators
noise-sensitive
extremely low dropout voltages, high PSRR, ultralow
output noise, low quiescent current (265
μ
A typically),
and enable input to reduce supply currents to less
than 1
μ
A when the regulator is turned off.
A typical application circuit is shown in
Figure 22
.
TPS796xx
family
been
equipment.
of
low-dropout
optimized
The
(LDO)
use
features
For example, the TPS79630 exhibits 40
μ
V
of
output voltage noise using a 0.1
μ
F ceramic bypass
capacitor and a 10
μ
F ceramic output capacitor. Note
that the output starts up slower as the bypass
capacitance increases due to the RC time constant
at the bypass pin that is created by the internal
250k
resistor and external capacitor.
has
for
in
device
Figure 22. Typical Application Circuit
area
improves
heat
Solder
devices are presented in an application bulletin
Solder Pad Recommendations for Surface-Mount
Devices
, literature number
AB-132
, available for
download from the TI web site (
www.ti.com
).
pad
footprint
recommendations
for
the
Like most low dropout regulators, the TPS796xx
requires an output capacitor connected between
OUT and GND to stabilize the internal control loop.
The minimum recommended capacitor is 1
μ
F. Any
1
μ
F or larger ceramic capacitor is suitable.
The internal voltage reference is a key source of
noise in an LDO regulator. The TPS796xx has an
NR pin which is connected to the voltage reference
through a 250k
internal resistor.
internal resistor, in conjunction with an external
bypass capacitor connected to the NR pin, creates a
low-pass filter to reduce the voltage reference noise
and, therefore, the noise at the regulator output. In
order for the regulator to operate properly, the
current flow out of the NR pin must be at a minimum,
because any leakage current creates an IR drop
across the internal resistor, thus creating an output
error. Therefore, the bypass capacitor must have
minimal leakage current. The bypass capacitor
should be no more than 0.1
μ
F in order to ensure that
it is fully charged during the quickstart time provided
by the internal switch shown in the functional block
diagram.
The
250k
where:
V
REF
= 1.2246V typ (the internal reference
voltage)
Resistors
approximately 40
μ
A divider current. Lower value
resistors
can
be
used
performance, but the device wastes more power.
Higher values should be avoided, as leakage current
at FB increases the output voltage error.
R1
and
R2
should
be
chosen
for
for
improved
noise
8
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TPS79718DCKR | 功能描述:低壓差穩(wěn)壓器 - LDO 10mA 1.8V MicroPwr RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS79718DCKRG4 | 功能描述:低壓差穩(wěn)壓器 - LDO 10-mA 1.8-V LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS79718DCKT | 功能描述:低壓差穩(wěn)壓器 - LDO 10-mA 1.8-V LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS79718DCKTG4 | 功能描述:低壓差穩(wěn)壓器 - LDO 10-mA 1.8-V LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS79718MDCKREP | 功能描述:低壓差穩(wěn)壓器 - LDO EP Ultra Lo-Pwr 10Ma LDO Linear Reg RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
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