參數(shù)資料
型號(hào): TPS728XX
廠商: Texas Instruments, Inc.
英文描述: 200mA Low-Dropout Linear Regulator with Pin-Selectable Dual-Voltage Level Output
中文描述: 200mA低與品差線性穩(wěn)壓器可選雙電壓電平輸出
文件頁數(shù): 2/22頁
文件大小: 763K
代理商: TPS728XX
www.ti.com
ABSOLUTE MAXIMUM RATINGS
(1)
At T
J
= –40
°
C to +125
°
C (unless otherwise noted). All voltages are with respect to GND.
DISSIPATION RATINGS
TPS728xx Series
SBVS095–AUGUST 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT
TPS728
vvvxxx
yyyz
V
OUT(2)
VVV
is the nominal output voltage for V
OUT1
and corresponds to V
SET
= Low.
XXX
is the nominal output voltage for V
OUT2
and corresponds to V
SET
= High.
YYY
is package designator.
Z
is Tape and reel quantity (R = 3000, T = 250).
(1)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
website at
www.ti.com
.
Output voltages from 0.9V to 3.6V in 50mV increments are available through the use of innovative factory EEPROM programming;
minimum order quantities may apply. Contact factory for details and availability.
(2)
PARAMETER
Input voltage range, V
IN
Enable and VSET voltage range, V
EN
and V
SET
Output voltage range, V
OUT
Maximum output current, I
OUT
Output short-circuit duration
Total continuous power dissipation, P
DISS
Human body model (HBM)
ESD rating
Charged device model (CDM)
Operating junction temperature range, T
J
Storage temperature range, T
STG
TPS728xx Series
–0.3 to +7.0
–0.3 to V
IN
+ 0.3
(2)
–0.3 to +7.0
UNIT
V
V
V
Internally limited
Indefinite
See
Dissipation Ratings
Table
2
500
–55 to +150
–55 to +150
kV
V
°
C
°
C
(1)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
V
EN
and V
SET
absolute maximum rating is V
IN
+ 0.3V or +7.0V, whichever is less.
(2)
DERATING FACTOR
ABOVE T
A
= +25
°
C
15.4mW/
°
C
3.7mW/
°
C
BOARD
High-K
(1)
High-K
(1)
PACKAGE
DRV
YZU
R
θ
JC
20
°
C/W
85
°
C/W
R
θ
JA
65
°
C/W
268
°
C/W
T
A
< +25
°
C
1540mW
370mW
T
A
= +70
°
C
845mW
205mW
T
A
= +85
°
C
615mW
150mW
(1)
The JEDEC high-K (2s2p) board used to derive this data was a 3-
×
3-inch, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
2
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Copyright 2007, Texas Instruments Incorporated
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