參數(shù)資料
型號： TPS70758PWPRG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20
封裝： GREEN, PLASTIC, HTSSOP-20
文件頁數(shù)： 24/40頁
文件大小： 918K
代理商： TPS70758PWPRG4
www.ti.com
LDO
Vin
VESR
Iout
RESR
Cout
RLOAD
Vout
+
TPS70745, TPS70748
TPS70751, TPS70758
TPS70702
SLVS291D – MAY 2000 – REVISED DECEMBER 2007
Figure 44 shows the output capacitor and its parasitic resistances in a typical LDO output stage.
Figure 44. LDO Output Stage with Parasitic Resistances ESR
In steady state (dc state condition), the load current is supplied by the LDO (solid arrow) and the voltage across
the capacitor is the same as the output voltage (V(CO) = VOUT). This condition means no current is flowing into the
CO branch. If IOUT suddenly increases (a transient condition), the following results occur:
The LDO is not able to supply the sudden current need because of its response time (t
1 in Figure 45).
Therefore, capacitor CO provides the current for the new load condition (dashed arrow). CO now acts like a
battery with an internal resistance, ESR. Depending on the current demand at the output, a voltage drop
occurs at RESR. This voltage is shown as VESR in Figure 40.
When C
O is conducting current to the load, initial voltage at the load will be VO = V(CO) – VESR. As a result of
the discharge of CO, the output voltage VO drops continuously until the response time t1 of the LDO is
reached and the LDO resumes supplying the load. From this point, the output voltage starts rising again until
it reaches the regulated voltage. This period is shown as t2 in Figure 45.
30
Copyright 2000–2007, Texas Instruments Incorporated
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