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參數(shù)資料
| 型號(hào)： | TPS70758PWPRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20 |
| 封裝： | GREEN, PLASTIC, HTSSOP-20 |
| 文件頁數(shù)： | 12/40頁 |
| 文件大?。?/td> | 918K |
| 代理商： | TPS70758PWPRG4 |
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1.8 V
VIN1
VIN2
EN
SEQ
VOUT1
VSENSE1
PG1
MR2
RESET
MR1
VSENSE2
VOUT2
TPS70751PWP
5 V
3.3 V
I/O
MR1
Core
0.1 mF
RESET
10 mF
0.1 mF
DSP
MR2
PG1
EN
250 kW
>2 V
<0.7 V
250 kW
>2 V
<0.7 V
>2 V
<0.7 V
TPS70745, TPS70748
TPS70751, TPS70758
TPS70702
SLVS291D – MAY 2000 – REVISED DECEMBER 2007
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 83mV on
regulator 1) and is directly proportional to the output current. Additionally, because the PMOS pass element is a
voltage-driven device, the quiescent current is very low and independent of output loading (maximum of 230
A
over the full range of output current). This LDO family also features a sleep mode; applying a high signal to EN
(enable) shuts down both regulators, reducing the input current to 1
A at T
J = +25°C.
The device is enabled when the EN pin is connected to a low-level input voltage. The output voltages of the two
regulators are sensed at the VSENSE1 and VSENSE2 pins, respectively.
The input signal at the SEQ pin controls the power-up sequence of the two regulators. When the device is
enabled and the SEQ terminal is pulled high or left open, VOUT2 turns on first and VOUT1 remains off until VOUT2
reaches approximately 83% of its regulated output voltage. At that time VOUT1 is turned on. If VOUT2 is pulled
below 83% (for example, an overload condition), VOUT1 is turned off. Pulling the SEQ terminal low reverses the
power-up order and VOUT1 is turned on first. The SEQ pin is connected to an internal pull-up current source.
For each regulator, there is an internal discharge transistor to discharge the output capacitor when the regulator
is turned off (disabled).
The PG1 pin reports the voltage conditions at VOUT1, which can be used to implement an SVS for the circuitry
supplied by regulator 1.
The TPS707xx features a RESET (SVS, POR, or Power-On Reset). RESET output initiates a reset in DSP
systems and related digital applications in the event of an undervoltage condition. RESET indicates the status of
VOUT2 and both manual reset pins (MR1 and MR2). When VOUT2 reaches 95% of its regulated voltage and MR1
and MR2 are in the logic high state, RESET goes to a high impedance state after a 120ms delay. RESET goes
to the logic low state when the VOUT2 regulated output voltage is pulled below 95% (for example, an overload
condition) of its regulated voltage. To monitor VOUT1, the PG1 output pin can be connected to MR1 or MR2.
The device has an undervoltage lockout (UVLO) circuit that prevents the internal regulators from turning on until
VIN1 reaches 2.5V.
2
Copyright 2000–2007, Texas Instruments Incorporated
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| TPS708 | 制造商:Toshiba 功能描述:Photodiode PIN Chip 850nm 2-Pin 0-5A1 |
| TPS70802 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED SVS FOR SPLIT VOLTAGE SYSTEMS |
| TPS70802PWP | 功能描述:低壓差穩(wěn)壓器 - LDO Dual Adj 250/125mA RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| TPS70802PWP | 制造商:Texas Instruments 功能描述:IC DUAL ADJ LDO 20-HTSSOP 制造商:Texas Instruments 功能描述:IC, DUAL ADJ LDO 20-HTSSOP |
| TPS70802PWPG4 | 功能描述:低壓差穩(wěn)壓器 - LDO Dual-Output LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
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