參數(shù)資料
型號(hào)： TPS65950ZXNT
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA209
封裝： 7 X 7 MM, 0.40 MM PITCH, PLASTIC, BGA-209
文件頁數(shù)： 159/167頁
文件大?。?/td> 2566K
代理商： TPS65950ZXNT
6.2.3
Headset Differential Input
6.2.4
FM Radio/Auxiliary Stereo Input
6.2.4.1 External Components
Onboard
Chip
CAUXL/R
CAUXL/R.M
AUXL/R
032-038
6.2.5
PDM Interface for Digital Microphones
TPS65950
Integrated Power Management/Audio Codec
www.ti.com
SWCS032 – OCTOBER 2008
The headset differential inputs (the HSMICP and HSMICM terminals) can be amplified by the microphone
amplification stage. The amplification stage outputs are connected to the ADC input.
The auxiliary inputs AUXL/FML and AUXR/FMR can be used as the left and right stereo inputs,
respectively, of the FM radio. In that case (because both input amplifiers are busy), the other input
terminals are discarded and set to a high-impedance state. Both microphone amplification stages amplify
the FM radio stereo signal. Both amplification stage outputs are connected to the ADC input. The left and
right channel inputs of the FM radio can also be output through an audio output stage (mono output stage
in case of mono input FM radio, stereo output stage in case of stereo input FM radio).
Figure 6-25 shows the external components of the auxiliary stereo input.
Figure 6-25. Audio Auxiliary Input
NOTE
For other component values, see Table 15-1.
The PDM interface is used as digital microphones inputs; each microphone is directly connected to the TX
filter decimator to extract the audio samples at desired accuracy and sample rate. Each digital microphone
is stereo (two paths). The digital microphone interface is DIG.MIC.CLK (clock input to the microphone)
and DIG.MIC (PDM data output from the microphone). The appropriate frequency of DIG.MIC.CLK is
generated by the audio PLL, and the ratio between DIG.MIC.CLK and the sample rate is 50 (see
Figure 6-26). The PDM interface is available only when FS = 48 kHz.
The data signal output is a 3-state output from the microphone. When a falling edge DIG.MIC.CLK is
detected, DIG.MIC is actively driven. When a rising DIG.MIC.CLK is detected, DIG.MIC is high
impedance. The latter DIG.MIC.CLK half-cycle is reserved for stereo operation (the second microphone
receives DIG.MIC.CLK inverted).
The
Σ-Δ converter in the digital microphones produces PDM.
Digital microphone characteristics:
PDM clock rate 2.4 MHz
Audio/Voice Module
91
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