參數(shù)資料
型號： TPS65950ZXNR
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA209
封裝： 7 X 7 MM, 0.40 MM PITCH, PLASTIC, BGA-209
文件頁數(shù)： 124/167頁
文件大?。?/td> 2566K
代理商： TPS65950ZXNR
TPS65950
Integrated Power Management/Audio Codec
SWCS032 – OCTOBER 2008
www.ti.com
List of Figures
1-1
TPS65950 Block Diagram
....................................................................................................... 16
2-1
PBGA Bottom View
............................................................................................................... 17
4-1
Power Provider Block Diagram
.................................................................................................. 36
4-2
VDD1 Dc-dc Regulator Efficiency
............................................................................................... 39
4-3
VDD1 Dc-dc Application Schematic
............................................................................................ 40
4-4
VDD2 Dc-dc Regulator Efficiency
............................................................................................... 42
4-5
VDD2 Dc-dc Application Schematic
............................................................................................ 43
4-6
VIO Dc-dc Regulator Efficiency in Active Mode
............................................................................... 45
4-7
VIO Dc-dc Application Schematic
............................................................................................... 46
4-8
Timings Before Sequence Start
................................................................................................ 60
4-9
Timings—OMAP2 Power-On Sequence
....................................................................................... 61
4-10
Timings—OMAP3 Power-On Sequence
....................................................................................... 62
4-11
Power-Off Sequence in Master Modes
......................................................................................... 63
6-1
Audio/Voice Module Block Diagram
............................................................................................ 65
6-2
Earphone Amplifier
................................................................................................................ 66
6-3
Earphone Speaker
................................................................................................................ 67
6-4
8-
Stereo Hands-Free Amplifiers.............................................................................................. 67
6-5
8-
Stereo Hands-Free .......................................................................................................... 69
6-6
Headset Amplifier
................................................................................................................. 69
6-7
Headset 4-Wire Stereo Jack Without an External FET
...................................................................... 71
6-8
Headset 4-Wire Stereo Jack With an External FET
.......................................................................... 72
6-9
Headset 5-Wire Stereo Jack
..................................................................................................... 73
6-10
Headset 4-Wire Stereo Jack Optimized
........................................................................................ 74
6-11
Headset Pop-Noise Cancellation Diagram
.................................................................................... 75
6-12
Predriver for External Class D
................................................................................................... 77
6-13
Vibrator H-Bridge
.................................................................................................................. 78
6-14
Carkit Output Downlink Path Characteristics
.................................................................................. 78
6-15
Digital Audio Filter Downlink Path Characteristics
............................................................................ 79
6-16
Digital Voice Filter Downlink Path Characteristics
............................................................................ 80
6-17
Voice Downlink Frequency Response With FS = 8 kHz...................................................................... 80
6-18
Voice Downlink Frequency Response With FS = 16 kHz .................................................................... 81
6-19
Analog and Digital Microphone Multiplexing
................................................................................... 84
6-20
Analog Microphone Pseudodifferential
......................................................................................... 86
6-21
Analog Microphone Differential
.................................................................................................. 87
6-22
Digital Microphone Bias Module Block Diagram
.............................................................................. 88
6-23
Digital Microphone Bias Module Timing Diagram
............................................................................. 89
6-24
Silicon Microphone Module
...................................................................................................... 90
6-25
Audio Auxiliary Input
.............................................................................................................. 91
6-26
Example of PDM Interface Circuitry
............................................................................................ 92
List of Figures
6
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