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參數(shù)資料
| 型號： | TPS65185RSLT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PQCC48 |
| 封裝： | 6 X 6 MM, 0.4 MM PITCH, 0.9 MM HEIGHT, PLASTIC, VQFN-48 |
| 文件頁數(shù)： | 6/49頁 |
| 文件大?。?/td> | 2488K |
| 代理商： | TPS65185RSLT |
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PRODUCTPREVIEW
SLVSAQ8A
– FEBRUARY 2011 – REVISED MAY 2011
MODES OF OPERATION
The TPS65185 has three modes of operation, SLEEP, STANDBY, and ACTIVE. SLEEP mode is the
lowest-power mode in which all internal circuitry is turned off. In STANDBY, all power rails are shut down but the
device is ready to accept commands through the I2C interface. In ACTIVE mode one or more power rails are
enabled.
SLEEP
This is the lowest power mode of operation. All internal circuitry is turned off, registers are
reset to default values and the device does not respond to I2C communications. TPS65185
enters SLEEP mode whenever WAKEUP pin is pulled low.
STANDBY
In STANDBY all internal support circuitry is powered up and the device is ready to accept
commands through the I2C interface but none of the power rails are enabled. The device
enters STANDBY mode when the WAKEUP pin is pulled high and either the PWRUP pin is
pulled low or the STANDBY bit is set. The device also enters STANDBY mode if input Under
Voltage Lock Out (UVLO), positive boost Under Voltage (VB_UV), or inverting buck-boost
Under Voltage (VN_UV) is detected, thermal shutdown occurs, or the PROG bit is set (see
VCOM calibration).
ACTIVE
The device is in ACTIVE mode when any of the output rails are enabled and no fault
condition is present. This is the normal mode of operation while the device is powered up.
MODE TRANSISITONS
SLEEP
→ ACTIVE
WAKEUP pin is pulled high with PWRUP pin high. Rails come up in the order defined by the
UPSEQx registers (OK to tie WAKEUP and PWRUP pin together).
SLEEP
→ STANDBY
WAKEUP pin is pulled high with PWRUP pin low. Rails will remain powered down.
STANDBY
→ ACTIVE
WAKEUP pin is high and PWRRUP pin is pulled high (rising edge) or the ACTIVE bit is set.
Output rails will power up in the order defined by the UPSEQx registers.
ACTIVE
→ STANDBY
WAKEUP pin is high and STANDBY bit is set or PWRUP pin is pulled low (falling edge).
Rails are shut down in the order defined by DWNSEQx registers. Device also enters
STANDBY in the event of Thermal Shut Down (TSD), Under Voltage Lock Out (UVLO),
positive boost or inverting buck-boost Under Voltage (UV), VCOM fault (VCOMF), or when
the PROG bit is set (see VCOM calibration).
STANDBY
→ SLEEP
WAKEUP pin is pulled low while none of the output rails are enabled.
ACTIVE
→ SLEEP
WAKEUP pin is pulled low while at least one output rail is enabled. Rails are shut down in
the order defined by DWNSEQx registers.
14
Copyright
2011, Texas Instruments Incorporated
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