參數資料
型號: TPS65014RGZ
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC48
封裝: 7 X 7 MM, GREEN, PLASTIC, VQFN-48
文件頁數: 42/57頁
文件大?。?/td> 1289K
代理商: TPS65014RGZ
www.ti.com
VREGS1Register (Address: 0Eh—Default Value: 88h)
TPS65014
SLVS551 – DECEMBER 2004
Bit 6-Bit 4 - CORE<2:0>: The following table shows all possible values of VCORE. The default value can
subsequently be overwritten via the serial interface after start-up.
CORE2
CORE1
CORE0
VCORE
0
0.85 V
0
1
1.0 V
0
1
0
1.1 V
0
1
1.2 V
1
0
1.3 V
1
0
1
1.4 V
1
0
1.5 V
1
1.8 V
Bit 3-Bit 2 - CORELP<1:0>: CORELP1 and CORELP0 can be used to set the VCORE voltage in low power
mode. In low power mode, CORE2 is effectively 0, and CORE1, CORE0 take on the values programmed at
CORELP1 and CORELP0, default 10 giving VCORE = 1.1 V as default in low power mode. When low power
mode is exited, VCORE reverts to the value set by CORE2, CORE1, and CORE0.
Bit 1 - VIB:
0 = disables the VIB output transistor.
1 = enables the VIB output transistor to drive the vibrator motor.
Bit 0 - CORE DISCHARGE:
0 = disables the active discharge of the VCORE converter output.
1 = enables the active discharge of the VCORE converter output in WAIT mode, or if VDCDC2 < 7 >= 1 in
LOW POWER mode.
VREGS1
B7
B6
B5
B4
B3
B2
B1
B0
Bit name
LDO2 enable
LDO2 OFF /
LDO21
LDO20
LDO1 enable
LDO1 OFF /
LDO11
LDO10
nSLP
Default
1
0
1
0
Read/write
R/W
The VREGS1 register is used to program and enable LDO1 and LDO2 and to set their behavior when low power
mode is active. The LDO output voltages can be set either on the fly, while the relevant LDO is disabled, or
simultaneously when the relevant enable bit is set. Note that both LDOs are per default ON.
Bit 7-Bit 6 - The function of the LDO2 enable and LDO2 OFF/nSLP bits is shown in the following table. See the
power-on sequencing section for details of low power mode.
LDO2 ENABLE
LDO2 OFF / nSLP
LDO STATUS IN NORMAL MODE
LDO STATUS IN LOW-POWER MODE
0
X
OFF
1
0
ON, full power
ON, reduced power/performance
1
ON, full power
OFF
Bit 5-Bit 4 - LDO2<1:0>: LDO2 has a default output voltage of 1.8 V. If desired, this can be changed at the same
time as it is enabled via the serial interface.
LDO21
LDO20
VLDO2
0
1.8 V
0
1
2.5 V
1
0
3.0 V
1
3.3 V
47
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相關代理商/技術參數
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