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參數(shù)資料
| 型號： | TPS53851RHHT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, PQCC36 |
| 封裝： | PLASTIC, VQFN-36 |
| 文件頁數(shù)： | 4/66頁 |
| 文件大?。?/td> | 1264K |
| 代理商： | TPS53851RHHT |
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FB1
COMP1
ILIM1
TRK1
CSR
T1
CS1
PGOOD1
UVLO_CE1
CLKIO
27
26
25
24
23
22
21
20
19
DIFFO
VOUT
GSNS
PHSEL
RT
VSHARE
GND
BP5
FB2
1
2
3
4
5
6
7
8
9
BOOT1
HDRV1
SW1
LDRV1
PGND
LDRV2
VREG
SW2
HDRV2
RHH PACKAGE
(TOP VIEW)
COMP2
ILIM2
TRK2
CSR
T2
CS2
PGOOD2
UVLOCE2
VDD
BOOT2
10
1
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
SLUS985 – DECEMBER 2009
www.ti.com
4
DEVICE INFORMATION
4.1
TERMINAL CONFIGURATION
The package is an 36-pin PQFP (RHH) package. The thermal pad is an electrical ground connection.
The TPS53851 is a versatile controller that can operate as a single controller or 'stacked' in a
multi-controller configuration. A TPS53851 has two channels that may be configured as a multi-phase
(single output) or as a dual, with two independent output voltages. The two channels of a single controller
always switch 180 degrees out of phase. See below for further discussion on the Clock and Voltage
master and Clock and Voltage slave.
Some pins are used to set the operating mode, and other pins' definition change based on the mode
selected.
It is often necessary to refer to a pin or pins that are used in CH1 and/or CH2. The short cut nomenclature
used is the pin name with a lower case 'x' to mean either or both channels. For example, TRKx refers to
TRK1 and/or TRK2.
4.2
CLOCK MASTER AND CLOCK SLAVE
A controller may function as a 'Clock master' or a 'Clock slave'. The term ' Clock master' designates the
controller, in a multi-controller configuration, that generates the CLKIO signal for clock synchronization
between the Clock master and the Clock slaves. The CLKIO signal is generated when the 'RT' pin of the
Clock master is terminated with a resistor to ground and the PHSEL pin of the Clock master is terminated
with a resistor, or resistor string, to ground. The 'Clock slave' is configured by connecting the RT pin to
BP5. Then the Clock slave receives the CLKIO signal from the Clock master. The phasing of the slave is
accomplished with a resistor string tied to the PHSEL pin. More information is covered in the CLOCK
MASTER, PHSEL AND CLKIO CONFIGURATIONS section.
12
DEVICE INFORMATION
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS53851
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