參數(shù)資料
型號: TPS53851RHHT
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, PQCC36
封裝: PLASTIC, VQFN-36
文件頁數(shù): 25/66頁
文件大?。?/td> 1264K
代理商: TPS53851RHHT
www.ti.com
SLUS985 – DECEMBER 2009
5.27.2 MULTIPLE DEVICES
In a multiple device system it is often desireable to synchronize the clocks each device to minimize input
ripple current as well as radiated and conducted emissions. This is accomplished by designating one of
the controllers as the 'master' and the other devices as 'slaves'. The master generates the system clock,
CLKIO , and it is distributed to the slaves. This is the most useful configuration of multiple devices and the
one that is demonstrated in this data sheet. It is described in more detail in the ' Clock master, PHSEL
AND CLKIO Configurations' section.
To increase the total current capability, or number of outputs, a single slave controller can be added to a
master controller as shown in Figure 5-15. The configuration of the 2-phase master and a 2-phase slave
controller is also shown in Table 5-3 It is possible to have the master controller operate on one switching
frequency and the slave controllers on another, independent frequency. In a multi-phase system the slave
controllers would continue to share load current with the master. This is not a preferred configuration and
is mentioned here only for completeness.
The 10-k
resistor connected from the CLKIO line to GND is required to ensure that the CLKIO line falls
to GND quickly when the master device is shutdown or powers off. The master CLKIO pin goes to a high
impedance state at these times and if the CLKIO line was high, there is no other active discharge part.
The slave controllers look at the CLKIO line to determine if the system is supposed to be running or not. A
level below 0.5 V on CLKIO is required for this purpose.
NOTE
In any system configured to have a CLK master and CLK slaves, a 10-k
resistor
connected from CLKIO to GND is required.
Table 5-3. TPS53851 Two-Device, Four-Phase Mode Selection and Pin
Configuration
DEVICE PIN,
MASTER, 2-PHASE
SLAVE, 2-PHASE
MASTER
SLAVE
COMP1
to network
COMP1
to master, COMP1
COMP2
COMP1
COMP2
to master, COMP1
TRK1
to SS capacitor
TRK1
to BP5
TRK2
to BP5
TRK2
to BP5
ILIM1
to set resistors
ILIM1
GND
ILIM2
GND
ILIM2
GND
FB1
to network
FB1
GND
FB2
GND
FB2
GND
PHSEL
39-k
TO GND
PHSEL
GND
PGOOD1
to pull-up resistor
PGOOD1
to pull-up resistor
PGOOD2
to pull-up resistor
PGOOD2
to pull-up resistor
CLKIO
to slave, CLKIO
CLKIO
to master, CLKIO
VSHARE
to slave, VSHARE
VSHARE
to master, VSHARE
BP5
to slave, BP5
BP5
to master, BP5
DESIGN HINT
TI recommends adding a 220-pF ceramic capacitor in parallel with the PHSEL resistor
string. This capacitor is connected from the PHSEL pin of the master controll to GND.
Copyright 2009, Texas Instruments Incorporated
APPLICATION INFORMATION
31
Product Folder Link(s): TPS53851
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