參數(shù)資料
型號(hào): TPS3610U18PWR
廠商: Texas Instruments, Inc.
英文描述: BATTERY-BACKUP SUPERVISORS FOR RAM RETENTION
中文描述: 電池備份的RAM保持監(jiān)事
文件頁數(shù): 10/22頁
文件大?。?/td> 453K
代理商: TPS3610U18PWR
SLVS327B
DECEMBER 2000
REVISED DECEMBER 2002
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description (continued)
manual switchover (MSWITCH)
While operating in the normal mode from V
DD
, the device can be forced manually to operate in battery-backup
mode by connecting MSWITCH to V
DD
. Refer to Table 1 for different switchover modes.
Table 1. Switchover Modes
MSWITCH
GND
STATUS
VDD mode
VDD mode
Switch to battery-backup mode
VDD
GND
VDD
Batter back p mode
Battery-backup mode
Battery-backup mode
Battery-backup mode
If the manual switchover feature is not used, MSWITCH
must
be connected to ground.
watchdog
In a microprocessor- or DSP-based system, it is important not only to supervise the supply voltage, but also to
ensure correct program execution. The task of a watchdog is to ensure that the program is not stalled in an
indefinite loop. The microprocessor, microcontroller or DSP has to toggle the watchdog input within typically
0.8 s to avoid the occurence of a time-out. Either a low-to-high or a high-to-low transition resets the internal
watchdog timer. If the input is unconnected, the watchdog is disabled and is retriggered internally.
saving current while using the watchdog
The watchdog input is internally driven low during the first 7/8 of the watchdog time-out period, then the input
momentarily pulses high, resetting the watchdog counter. For minimum watchdog input current (minimum
overall power consumption), WDI should be left low for the majority of the watchdog time-out period, and pulsed
low-high-low once within 7/8 of the watchdog time-out period to reset the watchdog timer. If instead WDI is
externally driven high for the majority of the timeout period, a current of, e.g., 5 V/40 k
125
μ
A, can flow into
WDI.
VIT
WDI
RESET
td
td
t(tout)
VOUT
td
Undefined
Figure 5. Watchdog Timing
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