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參數(shù)資料
| 型號(hào)： | TPS3307-33Y |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | TRIPLE PROCESSOR SUPERVISORS |
| 中文描述： | 三重處理器監(jiān)事 |
| 文件頁數(shù)： | 6/14頁 |
| 文件大小： | 430K |
| 代理商： | TPS3307-33Y |
www.ti.com
Electrical Characteristics
Over recommended operating free-air temperature range (unless otherwise noted)
TPS3307-18, TPS3307-25, TPS3307-33
SLVS199B–DECEMBER 1998–REVISED OCTOBER 2004
PARAMETER
TEST CONDITIONS
V
DD
= 2V to 6V, I
OH
= -20 μA
V
DD
= 3.3V, I
OH
= -2mA
V
DD
= 6V, I
OH
= -3mA
V
DD
= 2V to 6V, I
OL
= 20μA
V
DD
= 3.3V, I
OL
= 2mA
V
DD
= 6V, I
OL
= 3mA
V
DD
≥
1.1V, I
OL
= 20μA
V
DD
= 2V to 6V, T
A
= 0
°
C to 85
°
C
MIN
TYP
MAX
UNIT
V
DD
- 0.2V
V
DD
- 0.4V
V
DD
- 0.4V
V
OH
High-level output voltage
V
0.2
0.4
0.4
0.4
1.28
1.72
2.30
V
OL
Low-level output voltage
V
Power-up reset voltage
(1)
V
VSENSE3
1.22
1.64
2.20
2.86
4.46
1.25
1.68
2.25
2.93
4.55
V
VSENSE1,
VSENSE2
3
4.64
Negative-going input threshold volt-
age
(2)
V
IT-
V
DD
= 2V to 6V,
T
A
= -40
°
C to 85
°
C
VSENSE3
1.22
1.25
1.29
V
1.64
2.20
2.86
4.46
1.68
2.25
2.93
4.55
10
15
20
30
40
-130
1.73
2.32
3.02
4.67
VSENSE1,
VSENSE2
V
V
IT-
= 1.25V
V
IT-
= 1.68V
V
IT-
= 2.25V
V
IT-
= 2.93V
V
IT-
= 4.55V
MR = 0.7
×
V
DD,
V
DD
= 6 V
VSENSE1 = V
DD
= 6V
VSENSE2 = V
DD
= 6V
VSENSE3 = V
DD
MR = 0V, V
DD
= 6V
VSENSE1,2,3 = 0V
V
hys
Hysteresis at VSENSEn input
mV
MR
SENSE1
SENSE2
SENSE3
MR
SENSEn
-180
5
6
8
9
μA
I
H
High-level input current
-25
25
nA
μA
nA
μA
pF
-430
-600
25
40
I
L
Low-level input current
-25
I
DD
C
i
Supply current
Input capacitance
V
I
= 0V to V
DD
10
(1)
(2)
The lowest supply voltage at which RESET becomes active. t
, V
≥
15μs/V
To ensure best stability of the threshold voltage, a bypass capacitor (ceramic 0.1μF) should be placed close to the supply terminals.
6
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