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參數(shù)資料
| 型號(hào)： | TP3404V |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Quad Digital Adapter for Subscriber Loops (QDASL) |
| 中文描述： | DATACOM, TIME SLOT ASSIGNER, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁(yè)數(shù)： | 5/14頁(yè) |
| 文件大?。?/td> | 212K |
| 代理商： | TP3404V |
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Connection Diagram
TL/H/11924–2
Top View
Order Number TP3404V
See NS Package Number V28A
Functional Description
The QDASL contains 4 transceivers, each of which can in-
teroperate with any of the TP340X family of single-channel
DASL transceivers. Each QDASL transceiver has its own
independent line transmit and receive section, timing recov-
ery circuit, scrambler/descrambler and loop activation con-
troller. Functions which are shared by the 4 transceivers
include the Microwire control port and the digital interface
with time-slot assignment.
BURST MODE OPERATION
For full-duplex operation over a single twisted-pair, burst
mode timing is used, with the QDASL end of each line act-
ing as the loop timing master, and the DASL at the terminal
being the timing slave (the QDASL transceivers cannot op-
erate in loop timing slave mode).
Each burst within a DASL line is initiated by the QDASL
Master transmitting a startbit, for burst framing, followed by
the B1, B2 and D channel data from 2 consecutive 8 kHz
frames, combined in the format shown in Figure 1. During
transmit bursts the receiver input for that channel is inhibit-
ed to avoid disturbing the adaptive circuits. The slave’s re-
ceiver is enabled at this time and it synchronizes to the start
bit of the burst, which is always an unscrambled ‘‘1’’ (of the
opposite polarity to the last ‘‘1’’ sent in the previous burst).
When the slave detects that 36 bits following the start bit
have been received, it disables the received input, waits 6
line symbol periods to match the other end settling guard
time, and then begins to transmit its burst back towards the
master, which by this time has enabled its receiver input.
The burst repetition rate is thus 4 KHz.
LINE TRANSMIT SECTIONS
Alternate Mark Inversion (AMI) line coding, in which binary
‘‘1’’s are alternately transmitted as a positive pulse then a
negative pulse, is used on each DASL line because of its
spectral efficiency and null DC energy content. All transmit-
ted bits, excluding the start bit, are scrambled by a 9-bit
scrambler to provide good spectral spreading with a strong
timing content. The scrambler feedback polynomial is: X
9
a
X
5
a
1.
TL/H/11924–3
FIGURE 1. Burst Mode Timing on the Line
5
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| TP3410J | TP3410 ISDN Basic Access Echo-Cancelling 2B1Q U Transceiver |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TP3404V/63 | 功能描述:ISDN 接口 RoHS:否 制造商:Texas Instruments 封裝:Tube |
| TP3404V/63SN | 功能描述:ISDN 接口 RoHS:否 制造商:Texas Instruments 封裝:Tube |
| TP3404V/NOPB | 功能描述:ISDN 接口 RoHS:否 制造商:Texas Instruments 封裝:Tube |
| TP3406 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:DASL Digital Adapter for Subscriber Loops |
| TP3406N/NOPB | 功能描述:IC ADAPTER DIG QDASL QUAD 20PLCC RoHS:是 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
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