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參數(shù)資料
| 型號： | TP3071AN |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | Codec |
| 英文描述： | COMBO II Programmable PCM CODEC/Filter |
| 中文描述： | 組合二可編程PCM編解碼器/濾波器 |
| 文件頁數(shù)： | 14/26頁 |
| 文件大小： | 401K |
| 代理商： | TP3071AN |
Timing Specifications
(Continued)
Unless otherwise noted, limits printed in
BOLD
characters are guaranteed for V
= +5V
±
5%; V
= 5V
±
5%; T
= 0C to
+70C (40C to +85C for TP3070-X) by correlation with 100% electrical testing at T
= 25C. All other limits are assured by
correlation with other production tests and/or product design and characterization. All signals referenced to GND. Typicals
specified at V
= +5V, V
= 5V, T
= 25C.
All timing parameters are measured at V
= 2.0V and V
= 0.7V.
See Definitions and Timing Conventions section for test methods information.
Symbol
Parameter
Conditions
SERIAL CONTROL PORT TIMING
t
DSD
Delay Time, CS Low
Applies Only if Separate
to CO (CI/O) Valid
CS used for Byte 2
40C to +85C (TP3070-X)
t
DDZ
Delay Time, CS or 9th CCLK
High to CO (CI/O) High
Impedance
INTERFACE LATCH TIMING
t
SLC
Setup Time, IL to
Interface Latch Inputs Only
CCLK 8 of Byte 1
t
HCL
Hold Time, IL Valid from
8th CCLK Low (Byte 1)
t
DCL
Delay Time CCLK 8 of
Interface Latch Outputs Only
Byte 2 to IL
C
L
= 50 pF
MASTER RESET PIN
t
WMR
Duration of
Master Reset High
Min
Typ
Max
Units
80
ns
100
ns
Applies to Earlier of CS High or 9th
CCLK High
15
80
ns
100
ns
50
ns
200
ns
1
μs
Note 11:
Applies only to MCLK Frequencies
≥
1.536 MHz. At 512 kHz a 50:50
±
2% Duty Cycle must be used.
Timing Diagrams
DS008635-8
FIGURE 4. Non Delayed Data Timing Mode
www.national.com
14
相關PDF資料 |
PDF描述 |
|---|---|
| TP3071J | COMBO II Programmable PCM CODEC/Filter |
| TP3070V | COMBO II Programmable PCM CODEC/Filter |
| TP3071 | COMBO II Programmable PCM CODEC/Filter |
| TP3071N | COMBO II Programmable PCM CODEC/Filter |
| TP3070J | COMBO II Programmable PCM CODEC/Filter |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TP3071AN-G | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:COMBO II Programmable PCM CODEC/Filter |
| TP3071J | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:COMBO II Programmable PCM CODEC/Filter |
| TP3071N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:COMBO II Programmable PCM CODEC/Filter |
| TP3071NG | 制造商:National Semiconductor 功能描述:Audio Codec 1ADC / 1DAC 20-Pin PDIP Rail |
| TP3071N-G | 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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