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| 型號(hào)： | TMS470R1A384PZ-T |
| 廠商： | Texas Instruments |
| 文件頁(yè)數(shù)： | 4/62頁(yè) |
| 文件大小： | 0K |
| 描述： | IC RISC MCU 384K FLASH 100-LQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | TMS470 |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 48MHz |
| 連通性： | CAN，C2Slb，I²C，SCI，SPI |
| 外圍設(shè)備： | DMA，PWM，WDT |
| 輸入/輸出數(shù)： | 53 |
| 程序存儲(chǔ)器容量： | 384KB（384K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 32K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.71 V ~ 2.05 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 12x10b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 105°C |
| 封裝/外殼： | 100-LQFP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁(yè)面： | 718 (CN2011-ZH PDF) |
| 配用： | 296-23003-ND - KIT DEV KICKSTART TMS470 |
| 其它名稱： | 296-19292 |
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SPNS110E – AUGUST 2005 – REVISED MAY 2008 ......................................................................................................................................................... www.ti.com
Table 2. Terminal Functions (continued)
TERMINAL
INTERNAL
INPUT
OUTPUT
PULLUP/
DESCRIPTION
VOLTAGE(1)(2)
CURRENT(3)
NAME
PZ
PGE
PULLDOWN
SERIAL PERIPHERAL INTERFACE 1 (SPI1)
SPI1 clock. SPI1CLK can be programmed as a
SPI1CLK
3
4
GIO pin.
SPI1 chip enable. Can be programmed as a
SPI1ENA
2
GIO pin.
SPI1 slave chip select. Can be programmed as
SPI1SCS
1
5-V tolerant
4 mA
a GIO pin.
SPI1 data stream. Slave in/master out. Can be
SPI1SIMO
4
5
programmed as a GIO pin.
SPI1 data stream. Slave out/master in. Can be
SPI1SOMI
5
7
programmed as a GIO pin.
SERIAL PERIPHERAL INTERFACE 2 (SPI2)
SPI2CLK
39
56
SPI2 clock. Can be programmed as a GIO pin.
SPI2 chip enable. Can be programmed as a
SPI2ENA
42
60
GIO pin.
SPI2 slave chip select. Can be programmed as
SPI2SCS
43
62
5-V tolerant
4 mA
a GIO pin.
SPI2 data stream. Slave in/master out. Can be
SPI2SIMO
41
59
programmed as a GIO pin.
SPI2 data stream. Slave out/master in. Can be
SPI2SOMI
40
57
programmed as a GIO pin.
INTER-INTEGRATED CIRCUIT (I2C)
I2C1SDA
60
87
I2C1 serial data pin or GIO pin
I2C1SCL
61
88
I2C1 serial clock pin or GIO pin
I2C2SDA
64
94
I2C2 serial data pin or GIO pin
5-V tolerant
4 mA
I2C2SCL
65
95
I2C2 serial clock pin or GIO pin
I2C3SDA
20
29
I2C3 serial data pin or GIO pin
I2C3SCL
19
28
I2C3 serial clock pin or GIO pin
ZERO-PIN PHASE-LOCKED LOOP (ZPLL)
OSCIN
23
33
1.8 V
Crystal connection pin or external clock input
OSCOUT
22
32
2 mA
External crystal connection pin
Enable/disable the ZPLL. The ZPLL can be
PLLDIS
66
97
3.3 V
IPD (20 A)
bypassed and the oscillator becomes the system
clock.
SERIAL COMMUNICATIONS INTERFACE 1 (SCI1)
SCI1 clock. SCI1CLK can be programmed as a
SCI1CLK
33
48
3.3 V
2 mA
GIO pin.
SCI1 data receive. SCI1RX can be programmed
SCI1RX
32
46
5-V tolerant
4 mA
as a GIO pin.
SCI1 data transmit. SCI1TX can be programmed
SCI1TX
31
45
3.3 V
2 mA
as a GIO pin.
SERIAL COMMUNICATIONS INTERFACE 2 (SCI2)
SCI2 clock. SCI2CLK can be programmed as a
SCI2CLK
36
51
3.3 V
2 mA
GIO pin.
SCI2 data receive. SCI2RX can be programmed
SCI2RX
35
50
5-V tolerant
4 mA
as a GIO pin.
SCI2 data transmit. SCI2TX can be programmed
SCI2TX
34
49
3.3 V
2 mA
as a GIO pin.
12
Copyright 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): TMS470R1A384
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| TMS470R1A384PZ-TR | 制造商:Texas Instruments 功能描述:48MHZ / 384K FLASH - Tape and Reel |
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