參數(shù)資料
型號： TMS370
廠商： Texas Instruments, Inc.
英文描述： RADIO FREQUENCY I DENTIFICATION SYSTEMS
中文描述： 射頻我擠密系統(tǒng)
文件頁數(shù)： 48/54頁
文件大?。?/td> 785K
代理商： TMS370
TMS370Cx9x
8-BIT MICROCONTROLLER
SPNS036B – JANUARY 1996 – REVISED FEBRUARY 1997
48
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
analog-to-digital converter 3 (continued)
The ADC3 module allows complete freedom in design of the sources for the analog inputs. The period of the
sample time is user-defined so that the high-impedance sources can be accommodated without penalty to the
low-impedance sources. The sample period begins when the SAMPLE START bit of the ADC3 control register
(ADCTL.6) is set to 1. The end of the signal sample period occurs when the conversion bit (CONVERT START,
ADCTL.7) is set to 1. After a hold time, the converter will reset the SAMPLE START and CONVERT START bits,
signaling that a conversion has started and that the analog signal can be removed.
analog timing requirements
MIN
MAX
UNIT
tsu(S)
th(AN)
tw(C)
tw(S)
N = 16, 8, 4, or 2 upon selected conversion rate.
The value given is valid for a signal with a source impedance > 1 k
. If the source impedance is < 1 k
, use a minimum sampling time of 1
μ
s.
Setup time, analog to sample command
Hold time, analog input from start of conversion
Conversion time
Pulse duration, sample time per kilohm of source impedance
0
ns
(N+2)tc
ns
(10N + 4) tc
ns
1
μ
s/k
Analog In
Sample Time
Convert Time
Analog In Stable
th(AN)
tw(S)
tsu(S)
tsu(S)
tw(C)
Figure 23. Analog Timing
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