- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382643 > TMS3705A (Texas Instruments, Inc.) RADIO FREQUENCY I DENTIFICATION SYSTEMS PDF資料下載
參數(shù)資料
| 型號： | TMS3705A |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | RADIO FREQUENCY I DENTIFICATION SYSTEMS |
| 中文描述： | 射頻我擠密系統(tǒng) |
| 文件頁數(shù)： | 12/54頁 |
| 文件大小： | 785K |
| 代理商： | TMS3705A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁當前第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁
TMS370Cx9x
8-BIT MICROCONTROLLER
SPNS036B – JANUARY 1996 – REVISED FEBRUARY 1997
12
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
system reset (continued)
Table 6. Reset Sources
ááááááááááááááááááááááááááááááá
ááááááááááááááááááááááááááááááá
ááááááááááááááááááááááááááááááá
ááááááááááááááááááááááááááááááá
ááááááááááááááááááááááááááááááá
Once a reset is activated, the following sequence of events occurs:
1.
The CPU registers are initialized: ST = 00h, SP = 01h (reset state).
2.
Registers A and B are initialized to 00h (no other RAM is changed).
3.
The contents of the LSbyte of the reset vector (07FFh) are read and stored in the PCL.
4.
The contents of the MSbyte of the reset vector (07FEh) are read and stored in the PCH.
5.
Program execution begins with an opcode fetch from the address pointed to by the PC.
The reset sequence takes 20 SYSCLK cycles from the time the reset pulse is released until the first opcode
fetch. During a reset, RAM contents (except for registers A and B) remain unchanged, and the module control
register bits are initialized to their reset state.
interrupts
The TMS370 family software programmable interrupt structure permits flexible on-chip and external-interrupt
configurations to meet real-time interrupt-driven application requirements. The hardware-interrupt structure
incorporates two priority levels as shown in Figure 4. Interrupt level 1 has a higher priority than interrupt
level 2. The two priority levels can be masked independently by the global-interrupt mask bits (IE1 and IE2) of
the status register.
Each system interrupt is configured independently to either the high- or low-priority chain by the application
program during system initialization. Within each interrupt chain, the interrupt priority is fixed by the position of
the system interrupt. However, since each system interrupt is configured selectively on either the high- or
low-priority interrupt chain, the application program can elevate any system interrupt to the highest priority.
Arbitration between the two priority levels is performed within the CPU. Arbitration within each of the priority
chains is performed within the peripheral modules to support interrupt expansion for future modules. Pending
interrupts are serviced upon completion of current instruction execution, depending on their interrupt mask and
priority conditions.
相關PDF資料 |
PDF描述 |
|---|---|
| TMS370C002A | 8-BIT MICROCONTROLLER |
| TMS370C010A | 8-BIT MICROCONTROLLER |
| TMS370CX7XFN | 8-BIT MICROCONTROLLER |
| TMS370CX7XFZ | 8-BIT MICROCONTROLLER |
| TMS370Cx6xFN | 8-BIT MICROCONTROLLER |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TMS3705A1DRG4 | 功能描述:RFID應答器 Transponder base station IC RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| TMS3705ADR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMS3705BDRG4 | 功能描述:RFID應答器 LF Reader IC RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| TMS3705DDRQ1 | 功能描述:IC RFID BASE STATION LF 16SOIC 制造商:texas instruments 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 類型:RFID 閱讀器 頻率:134.2kHz 標準:- 接口:- 電壓 - 電源:5V 工作溫度:-40°C ~ 85°C 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應商器件封裝:16-SOIC 標準包裝:1 |
| TMS3705DR | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。