參數(shù)資料
型號: TMS320LF2407PGS
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: DSP CONTROLLERS
中文描述: DSP控制器
文件頁數(shù): 91/115頁
文件大?。?/td> 1511K
代理商: TMS320LF2407PGS
SPRS094I APRIL 1999 REVISED SEPTEMBER 2003
91
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
external memory interface
ready-on-read
timings
switching characteristics over recommended operating conditions for an external memory
interface ready-on-read (see Figure 41)
PARAMETER
MIN
MAX
UNIT
td(COLA)RD
Delay time, CLKOUT low to address valid
8
ns
timing requirements for an external memory interface ready-on-read (see Figure 41)
MIN
MAX
UNIT
th(RDY)COH
Hold time, READY after CLKOUT high
3
ns
tsu(D)RD
tv(RDY)ARD
tsu(RDY)COH
Setup time, read data before RD strobe inactive high
10
ns
Valid time, READY after address valid on read
2
ns
Setup time, READY before CLKOUT high
22
ns
th(RDY)COH
CLKOUT
PS, DS, IS
RD
D[0:15]
STRB
A[0:15]
td(COLA)RD
tv(RDY)ARD
tsu(RDY)COH
READY
Wait Cycle
tsu(D)RD
The WSGR register must be programmed before the READY pin can be used. See the READY pin description for more details.
Figure 41. Ready-on-Read Timings
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