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參數(shù)資料
| 型號： | TMS320LF2407PGS |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | DSP CONTROLLERS |
| 中文描述： | DSP控制器 |
| 文件頁數(shù)： | 73/115頁 |
| 文件大?。?/td> | 1511K |
| 代理商： | TMS320LF2407PGS |
SPRS094I APRIL 1999 REVISED SEPTEMBER 2003
73
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
LPM2 wakeup timings
switching characteristics over recommended operating conditions (see Figure 27)
PARAMETER
MIN
MAX
UNIT
td(PDP-PWM)HZ
Delay time, PDPINTx low to PWM high-impedance state
12
ns
td(INT)
Delay time, INT low/high to interrupt-vector fetch
10tc(CO)
ns
timing requirements [H = 0.5t
c(CO)
] (see Figure 27)
MIN
NOM
MAX
UNIT
tw(INT)
tw(PDP)
tp
Pulse duration, INT input low/high
2H+15
ns
Pulse duration, PDPINTx input low
4H+5
ns
PLL lock-up time
4096tc(CI)
cycles
PWM
PDPINTx
CLKOUT
tw(PDP)
td(PDP-PWM)HZ
CPU Status
Interrupt Vector§ or
Next Instruction
td(INT)
XTAL1
Oscillator Disabled
CLKIN
tp
tOSC
CPU IDLE State (LPM2)
tOSC is the oscillator start-up time.
CLKOUT frequency after LPM2 wakeup will be the same as that upon entering LPM2 (x4 shown as an example).
§PDPINTx interrupt vector, if PDPINTx interrupt is enabled.
If PDPINTx interrupt is disabled.
Figure 27. LPM2 Wakeup Using PDPINTx
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