參數(shù)資料
型號： TMS320F2812GHHMEP
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： Digital Signal Processors
中文描述： 數(shù)字信號處理器
文件頁數(shù)： 138/159頁
文件大小： 2084K
代理商： TMS320F2812GHHMEP
Electrical Specifications
136
March 2004 Revised October 2004
SGUS051A
6.30.2
ADC Electrical Characteristics Over Recommended Operating Conditions
Table 639. DC Specifications (See Note 1)
PARAMETER
MIN
TYP
MAX
UNIT
Bits
kHz
MHz
Resolution
12
1
ADC clock (See Note 2)
25
ACCURACY
INL (Integral nonlinearity) (See Note 3)
DNL (Differential nonlinearity) (See Note 3)
Offset error (See Note 4)
Overall gain error with internal reference
(See Note 5)
Overall gain error with external reference
(See Note 6)
Channel-to-channel offset variation
Channel-to-channel Gain variation
118.75 MHz ADC clock
118.75 MHz ADC clock
±
1.5
±
1
80
LSB
LSB
LSB
80
200
200
LSB
If ADCREFPADCREFM = 1 V
±
0.1%
50
50
LSB
±
8
±
8
LSB
LSB
ANALOG INPUT
Analog input voltage (ADCINx to ADCLO)
(See Note 7)
ADCLO
Input capacitance
Input leakage current
0
3
V
5
0
5
mV
pF
μ
A
10
3
±
5
INTERNAL VOLTAGE REFERENCE
(See Note 5)
Accuracy, ADCVREFP
Accuracy, ADCVREFM
Voltage difference, ADCREFP ADCREFM
Temperature coefficient
Reference noise
1.9
0.95
2
1
1
2.1
1.05
V
V
V
50
100
PPM/
°
C
μ
V
EXTERNAL VOLTAGE REFERENCE (See Note 6)
Accuracy, ADCVREFP
Accuracy, ADCVREFM
Input voltage difference,
ADCREFP ADCREFM
1.9
0.95
2
1
2.1
1.05
V
V
0.99
1
1.01
V
NOTES:
1. Tested at 12.5-MHz ADCCLK
2. If SYSCLKOUT
≤
25 MHz, ADC clock
≤
SYSCLKOUT/2
3. The INL degrades for frequencies beyond 18.75 MHz 25 MHz. Applications that require these sampling rates should use a
20K-resistor as bias resistor on the ADCRESEXT pin. This improves overall linearity and typical current drawn by the ADC will
be a few mA more than 24.9 k
bias.
4. 1 LSB has the weighted value of 3.0/4096 = 0.732 mV.
5. A single internal band gap reference (
±
5% accuracy) sources both ADCREFP and ADCREFM signals, and hence, these voltages
track together. The ADC converter uses the difference between these two as its reference. The total gain error will be the
combination of the gain error shown here and the voltage reference accuracy (ADCREFP ADCREFM). A software-based
calibration procedure is recommended for better accuracy. See
F2812 ADC Calibration Application Note
(literature number
SPRA989) and Section 5.2, Documentation Support, for relevant documents.
6. In this mode, the accuracy of external reference is critical for overall gain. The voltage difference (ADCREFPADCREFM) will
determine the overall accuracy.
7. Voltages above VDDA + 0.3 V or below VSS 0.3 V applied to an analog input pin may temporarily affect the conversion of another
pin. To avoid this, the analog inputs should be kept within these limits.
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