參數(shù)資料
型號: TMS320F2809_07
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processors
中文描述: 數(shù)字信號處理器
文件頁數(shù): 37/140頁
文件大小: 1108K
代理商: TMS320F2809_07
www.ti.com
3.2.5
Flash
3.2.6
ROM
3.2.7
M0, M1 SARAMs
3.2.8
L0, L1, H0 SARAMs
3.2.9
Boot ROM
TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801
TMS320C2802, TMS320C2801, and TMS320F2801x DSPs
SPRS230J–OCTOBER 2003–REVISED SEPTEMBER 2007
The F2809 contains 128K x 16 of embedded flash memory, segregated into eight 16K X 16 sectors. The
F2808 contains 64K x 16 of embedded flash memory, segregated into four 16K X 16 sectors. The F2806
and F2802 have 32K X 16 of embedded flash, segregated into four 8K X 16 sectors. The F2801 device
contains 16K X 16 of embedded flash, segregated into four 4K X 16 sectors. All five devices also contain
a single 1K x 16 of OTP memory at address range 0x3D 7800 – 0x3D 7BFF. The user can individually
erase, program, and validate a flash sector while leaving other sectors untouched. However, it is not
possible to use one sector of the flash or the OTP to execute flash algorithms that erase/program other
sectors. Special memory pipelining is provided to enable the flash module to achieve higher performance.
The flash/OTP is mapped to both program and data space; therefore, it can be used to execute code or
store data information. Note that addresses 0x3F7FF0 – 0x3F7FF5 are reserved for data variables and
should not contain program code.
NOTE
The F2809/F2808/F2806/F2802/F2801 Flash and OTP wait-states can be configured by
the application. This allows applications running at slower frequencies to configure the
flash to use fewer wait-states.
Flash effective performance can be improved by enabling the flash pipeline mode in the
Flash options register. With this mode enabled, effective performance of linear code
execution will be much faster than the raw performance indicated by the wait-state
configuration alone. The exact performance gain when using the Flash pipeline mode is
application-dependent.
For more information on the Flash options, Flash wait-state, and OTP wait-state registers,
see the
TMS320x280x System Control and Interrupts Reference Guide
(literature number
SPRU712
).
The C2802 contains 32K x 16 of ROM, while the C2801 contains 16K x 16 of ROM.
All 280x devices contain these two blocks of single access memory, each 1K x 16 in size. The stack
pointer points to the beginning of block M1 on reset. The M0 and M1 blocks, like all other memory blocks
on C28x devices, are mapped to both program and data space. Hence, the user can use M0 and M1 to
execute code or for data variables. The partitioning is performed within the linker. The C28x device
presents a unified memory map to the programmer. This makes for easier programming in high-level
languages.
The F2809 and F2808 each contain an additional 16K x 16 of single-access RAM, divided into 3 blocks
(L0-4K, L1-4K, H0-8K). The F2806 contains an additional 8K x 16 of single-access RAM, divided into
2 blocks (L0-4K, L1-4K). The F2802, F2801, C2802, and C2801 each contain an additional 4K x 16 of
single-access RAM (L0-4K). Each block can be independently accessed to minimize CPU pipeline stalls.
Each block is mapped to both program and data space.
The Boot ROM is factory-programmed with boot-loading software. Boot-mode signals are provided to tell
the bootloader software what boot mode to use on power up. The user can select to boot normally or to
download new software from an external connection or to select boot software that is programmed in the
internal Flash/ROM. The Boot ROM also contains standard tables, such as SIN/COS waveforms, for use
in math related algorithms.
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Functional Overview
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