參數(shù)資料
型號: TMS320F2809_07
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processors
中文描述: 數(shù)字信號處理器
文件頁數(shù): 110/140頁
文件大?。?/td> 1108K
代理商: TMS320F2809_07
www.ti.com
6.9.4
Low-Power Mode Wakeup Timing
WAKE INT
(A)
XCLKOUT
Address/Data
(internal)
t
d(WAKEIDLE)
t
w(WAKEINT)
TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801
TMS320C2802, TMS320C2801, and TMS320F2801x DSPs
SPRS230J–OCTOBER 2003–REVISED SEPTEMBER 2007
Table 6-16
shows the timing requirements,
Table 6-17
shows the switching characteristics, and
Figure 6-12
shows the timing diagram for IDLE mode.
Table 6-16. IDLE Mode Timing Requirements
(1)
MIN
NOM
MAX
UNIT
Without input qualifier
With input qualifier
2t
c(SCO)
5t
c(SCO)
+ t
w(IQSW)
t
w(WAKE-INT)
Pulse duration, external wake-up signal
cycles
(1)
For an explanation of the input qualifier parameters, see
Table 6-15
.
Table 6-17. IDLE Mode Switching Characteristics
(1)
PARAMETER
Delay time, external wake signal to
program execution resume
(2)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Without input qualifier
With input qualifier
Without input qualifier
With input qualifier
Without input qualifier
With input qualifier
20t
c(SCO)
cycles
Wake-up from Flash
Flash module in active state
20t
c(SCO)
+ t
w(IQSW)
1050t
c(SCO)
1050t
c(SCO)
+ t
w(IQSW)
t
d(WAKE-IDLE)
cycles
Wake-up from Flash
Flash module in sleep state
20t
c(SCO)
cycles
Wake-up from SARAM
20t
c(SCO)
+ t
w(IQSW)
(1)
(2)
For an explanation of the input qualifier parameters, see
Table 6-15
.
This is the time taken to begin execution of the instruction that immediately follows the IDLE instruction. execution of an ISR (triggered
by the wake up) signal involves additional latency.
A.
WAKE INT can be any enabled interrupt, WDINT, XNMI, or XRS.
Figure 6-12. IDLE Entry and Exit Timing
Table 6-18. STANDBY Mode Timing Requirements
TEST CONDITIONS
Without input qualification
With input qualification
(1)
MIN
NOM
MAX
UNIT
3t
c(OSCCLK)
Pulse duration, external
wake-up signal
t
w(WAKE-INT)
cycles
(2 + QUALSTDBY) * t
c(OSCCLK)
(1)
QUALSTDBY is a 6-bit field in the LPMCR0 register.
Electrical Specifications
110
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