參數(shù)資料
型號(hào): TMS320AV120
廠(chǎng)商: Texas Instruments, Inc.
英文描述: MPEG Audio Decoder(MPEG音頻譯碼器)
中文描述: MPEG音頻解碼器(的MPEG音頻譯碼器)
文件頁(yè)數(shù): 12/17頁(yè)
文件大?。?/td> 380K
代理商: TMS320AV120
TMS320AV120
MPEG AUDIO DECODER
SCSS014A – MARCH 1994 – REVISED JANUARY 1996
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
status-register-output interface (continued)
td6
td3
td3
td4
Status Bit 32
Status Bit 31
SCLK
STATOUT
STATCLK
BOF
Status Bit 0
Figure 8. Status-Register-Output Timing
audio/video synchronization
In systems where audio/video synchronization is required, the TMS320AV120 has the capability of interpreting
and comparing the system clock reference (SCR) and the audio presentation time stamp (PTS). Since both the
SCR and the PTS are present only at the pack and packet level of the MPEG bit stream, and not in the audio
frames, they have to be supplied to the TMS320AV120 from the system controller.
The SCR and PTS information is transmitted to the TMS320AV120 over SIN, MSB first, multiplexed with the
compressed-audio data. SMODE signals the presence of timing information. When SMODE is low, the data on
SIN is interpreted as compressed-audio data. When SMODE transitions high, the next 34 bits of the serial data
is interpreted as either a PTS if bit 33 is a zero or an SCR if bit 33 is a one.
The system is expected to transmit all PTS stamps to the TMS320AV120 as found in the system stream. SCR
information (updated at the 90-kHz rate) should be transmitted to the audio decoder about once a ms.
The TMS320AV120 compares the PTS associated with the frame being output with the latest SCR. When the
delta reaches the duration of one frame, the ’AV120 either delays or attempts to catch up until the times match.
While the chip can always delay, it can only catch up if the compressed-data input is at a rate higher than the
actual bit rate. During each delay operation, one muted frame is inserted. During each catch-up operation, one
frame is skipped. If synchronization is required, the data should be available to the TMS320AV120 when
requested by the SREQ control signal. For designs that do not need synchronization, SMODE is tied low.
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