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| 型號： | TMPR28051 |
| 英文描述： | TMPR28051 STS-1/AU-3 (STM-0) Mapper Device Advisory for Version 5 of the Device |
| 中文描述： | TMPR28051 STS-1/AU-3（的STM - 0）映射為版本的設(shè)備5設(shè)備咨詢 |
| 文件頁數(shù)： | 63/90頁 |
| 文件大小： | 1090K |
| 代理商： | TMPR28051 |
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Data Sheet
August 1999
TMPR28051 STS-1/AU-3 (STM-0) Mapper
49
Lucent Technologies Inc.
Microprocessor Interface Description
(continued)
Register Architecture Description
(continued)
Table 17. DS1/E1 Insertion Selection Format
VT Drop Selection (0x33—0x4E)
Table 18. Registers 0x33—0x4E: VT Drop Selection
5 Programmed DS1/E1INS[4:0]_x Bits
Bit 4
Bit 3
Bit 2
0
0
0
0
0
0
1
1
1
1
1
1
VT1.5 #
1
2
3
26
27
28
VT Group #
1
2
3
5
6
7
VT #
1
1
1
4
4
4
Address
17
18
19
30
31
32
Bit 1
0
1
1
1
1
0
Bit 0
1
0
1
0
1
0
0
0
0
0
0
1
Address
(Hex)
Bit #
Name
Function
Reset
Default
(Hex)
Value is
0.
0x33—0x4E
7
6
—
Reserved.
The RXESOF[1:28] bits (see VT Drop Selection Registers,
Table 14, page 25) report the receive elastic store overflow
condition. When any of these bits is 1, the corresponding
DS1/E1 output has experienced an elastic store overflow.
This value is latched by these bits until read by the micro-
processor.
The TXESOF[1:28] bits (see Control, Alarm, and Mask Bit
Registers, Table 14, page 23) report the transmit elastic
store overflow condition. When any of these bits is 1, the
corresponding DS1/E1 input has experienced an elastic
store overflow. This value is latched by these bits until read
by the microprocessor.
VTDROP4_[1:28] These bits in registers 0x33—0x4E are used to select the
VT1.5 slot for the DS1/E1 outputs. The VT1.5 selected in
Table 17 corresponds to the decimal value of these pro-
grammed 5 bits. If these bits contain 00000, or 11101—
11111, then the device inserts the following:
VTDROP0_[1:28]
RXESOF[1:28]
5
TXESOF[1:28]
4
3
2
1
0
00000 = device does not transmit any clock or data
11101 = device inserts a DS1 AIS into the corresponding
DS1/E1 slot
11110 = device inserts a E1 AIS into the corresponding
DS1/E1 slot
11111= device inserts the test pattern
Since the device defaults these bits in all 28 of these regis-
ters to 00000, there will be no clock or data in any of the
28 DS1 or 21 E1 slots after reset. VTDROP[4:0]_[1:28],
bits 00001—11100, correspond to the specific VT1.5
streams as shown in Table , page 50. Address 0x33—
0x4E correspond to VTs as shown in Table 20, also on
page 50.
VTDROP3_[1:28]
VTDROP2_[1:28]
VTDROP1_[1:28]
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