參數(shù)資料
型號： TMP32C6411AZLZ
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： FIXED POINT DIGITAL SIGNAL PROCESSOR
中文描述： 定點(diǎn)數(shù)字信號處理器
文件頁數(shù)： 22/119頁
文件大小： 1742K
代理商： TMP32C6411AZLZ
SPRS196H MARCH 2002 REVISED JULY 2004
22
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
peripheral register descriptions (continued)
Table 11. McBSP 1 Registers
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
COMMENTS
0190 0000
DRR1
Data receive register via Configuration Bus
The CPU and EDMA
controller can only read this
register; they cannot write to
it.
0x3400 0000 0x37FF FFFF
0190 0004
0x3400 0000 0x37FF FFFF
0190 0008
0190 000C
0190 0010
0190 0014
0190 0018
0190 001C
0190 0020
0190 0024
0190 0028
0190 002C
0190 0030
0190 0034
0190 0038
0190 003C
0190 0040 0193 FFFF
DRR1
DXR1
DXR1
SPCR1
RCR1
XCR1
SRGR1
MCR1
RCERE01
XCERE01
PCR1
RCERE11
XCERE11
RCERE21
XCERE21
RCERE31
XCERE31
–
McBSP1 data receive register via Peripheral Data Bus
McBSP1 data transmit register via Configuration Bus
McBSP1 data transmit register via Peripheral Data Bus
McBSP1 serial port control register
McBSP1 receive control register
McBSP1 transmit control register
McBSP1 sample rate generator register
McBSP1 multichannel control register
McBSP1 enhanced receive channel enable register 0
McBSP1 enhanced transmit channel enable register 0
McBSP1 pin control register
McBSP1 enhanced receive channel enable register 1
McBSP1 enhanced transmit channel enable register 1
McBSP1 enhanced receive channel enable register 2
McBSP1 enhanced transmit channel enable register 2
McBSP1 enhanced receive channel enable register 3
McBSP1 enhanced transmit channel enable register 3
Reserved
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