參數(shù)資料
型號： TMP320R2811PBKS
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： TMS320R2811, TMS320R2812 Digital Signal Processors
中文描述： TMS320R2811，TMS320R2812數(shù)字信號處理器
文件頁數(shù)： 51/147頁
文件大?。?/td> 2021K
代理商： TMP320R2811PBKS
Peripherals
51
June 2004
SPRS257
In R281x devices, the timer interrupt signals (TINT0, TINT1, TINT2) are connected as shown in Figure 4
2.
INT1
to
INT12
INT14
C28x
TINT2
TINT0
PIE
CPU-TIMER 0
CPU-TIMER 2
Reserved RTOS
(DSP/BIOS)
INT13
TINT1
CPU-TIMER 1
XINT13
NOTES: A. The timer registers are connected to the Memory Bus of the C28x processor.
B. The timing of the timers is synchronized to SYSCLKOUT of the processor clock.
Figure 4
2. CPU-Timer Interrupts Signals and Output Signal (See Notes A and B)
The general operation of the timer is as follows: The 32-bit counter register “TIMH:TIM” is loaded with the value
in the period register “PRDH:PRD”. The counter register, decrements at the SYSCLKOUT rate of the C28x.
When the counter reaches 0, a timer interrupt output signal generates an interrupt pulse. The registers listed
in Table 4
1 are used to configure the timers. For more information, see the
TMS320F28x System Control
and Interrupts Reference Guide
(literature number SPRU078).
A
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