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參數(shù)資料
| 型號： | TMC2490A |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Multistandard Digital Video Encoder |
| 中文描述： | 多標準數(shù)字視頻編碼器 |
| 文件頁數(shù)： | 5/36頁 |
| 文件大?。?/td> | 510K |
| 代理商： | TMC2490A |
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PRODUCT SPECIFICATION
TMC2490A
REV. 1.0.2 2/27/02
5
Control Registers
The TMC2490A is initialized and controlled by a set of reg-
isters which determine the operating modes.
An external controller is employed to write and read the
Control Registers through either the 8-bit parallel or 2-line
serial interface port. The parallel port, D
pins CS, R/W, and ADR. The serial port is controlled by
SDA and SCL.
7-0
, is governed by
Table 1. Control Register Map
Reg
TMC2490A Identification Registers (Read only)
00
7-0
PARTID2
01
7-0
PARTID1
02
7-0
PARTID0
03
7-0
REVID
Global Control Register
04
7
MASTER
04
6
NGSEL
04
5
YCDELAY
04
4
RAMPEN
04
3
YCDIS
04
2
COMPDIS
04
1-0
FORMAT
Video Output Control Register
05
7
PALN
05
6
BURSTF
05
5
CHRBW
05
4
SYNCDIS
05
3
BURDIS
05
2
LUMDIS
05
1
CHRDIS
05
0
PEDEN
Field ID Register
06
7-6
Reserved
06
5-3
FIELD
06
2-0
Reserved
Reserved Registers
07-
0D
Bit
Mnemonic
Function
Reads back 97h
Reads back 24h
Reads back 90h (91h)
Silicon revision #
Master Mode
NTSC Gain Select
Luma to chroma delay
Modulated ramp enable
LUMA, CHROMA disable
COMPOSITE disable
Television standard select
Select PAL-N Subcarrier
Burst flag disable
Chroma bandwidth select
Sync pulse disable
Color burst disable
Luminance disable
Chrominance disable
Pedestal enable
Program LOW
Field ID (Read only)
Program LOW
7-0
Reserved
Program LOW
Notes:
1. For each register listed above, all bits not specified are
reserved and should be set to logic LOW to ensure proper
operation.
General Purpose Port Register
PORT7-6
PORT5-2
BURSTF
CSYNC
General Control Register
PED21
VSEL
CBSEL
VBIEN
1-0
HDSEL
Reserved Registers
7-0
Reserved
0E
0E
0E
0E
7
6
1
0
General purpose Inputs
General purpose Outputs
Burst Flag Output
Composite Sync Output
0F
0F
0F
0F
0F
7
5
4
3
VBI Pedestal Enable
Vertical Sync Select
CBSEL/PDC Pin Function
VBI Pixel Data Enable
HSYNC Delay
10-
1F
May be left unprogrammed
Closed-Caption Insertion Registers
7-0
CCD1
7-0
CCD2
7
CCON
6
CCRTS
5
CCPAR
4
CCFLD
3-0
CCLINE
20
21
22
22
22
22
22
First Byte of CC Data
Second Byte of CC Data
Enable CC Data Packet
Request To Send Data
Auto Parity Generation
CC Field Select
CC Line Select
Reg
Bit
Mnemonic
Function
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMC2490AR2C | 功能描述:視頻 IC Dig Video Decoder Multistandard RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC2490AR2CT | 功能描述:視頻 IC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC249A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High Current Microstep Stepper Motor Driver with sensorless stall detection, protection / diagnostics and SPI Interface |
| TMC249-A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High Current Microstep Stepper Motor Driver with Sensorless Stall D e t e c t i o n ,P rotection / Diagnosis and SPI Interface |
| TMC249A-LA | 制造商:Trinamic 功能描述:IC BRIDGE DRIVER SPI/ANLG 32QFN |
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