
TMC22x5y
PRODUCT SPECIFICATION
54
P
Output Processor
Figure 24. Output Processor Block Diagram
Clamp Circuit
A clamp pulse generated by the Burst Gate signal is used to 
grab either a sample of the low-pass-filtered luma during the 
video back porch, the signal on VIDEOB, or one of two 
internally generated levels. The selection is made by the 
CLMP[1:0] register bits.
Table 11. Blanking Level Selection
The blanking level is subtracted from the decoded luma. 
If the sign is negative, the result is assumed to be mixed sync 
and is passed through a delay and into the sync gain stage 
within the output matrix. If the sign is positive, the result is 
assumed to be pure luma (blanking to peak white) and is fed 
to the pedestal removal circuit. 
Pedestal Removal
The 8 bit programmable pedestal is subtracted from the pure 
luma signal. The negative super black signals are clipped to 
zero when register 0Ah bit 4 is set LOW, or the super black 
signals are passed through the luma scalar when register 0Ah 
bit 4 is HIGH.
Adaptive Notch Filter
The PAL line-locked comb decoder can never provide 
perfect subcarrier cancellation due to the 25Hz offset in the 
subcarrier frequency. This 25Hz offset causes residual and 
phase modified subcarrier to be left on the luminance signal 
which can produce a visible dot crawl on flat areas of color. 
However, for all comb filter structures, the quality of the 
comb depends on the quality of the sampling clock, as line to 
line clock jitter will also cause small phase changes between 
the inputs to the comb filter. It is therefore possible that 
NTSC comb decoders may also require some coring of the 
luma output. To meet the wide range of sample frequencies 
that the decoder must deal with two separate coring filters 
are selectable.
The luma signal from the pedestal stripper is compared 
against the preceding pixel to detect the magnitude change 
between pixels. This magnitude difference will be almost 
zero for flat areas of picture, and large for high frequency 
changes in the picture. The magnitude difference is com-
pared to one of four programmable thresholds. The program-
mable threshold is selected by the ANT
1-0
 register bits as 
shown in Table 12.
Table 12. Adaptive Notch Threshold Control
Mixed Sync
65-22x5y-65
SGx[9:0]
X
X
X
X
X
X
YGx[9:0]
YOFF[8:0]
Adaptive Luma
Notch Filter
ANT
[1:0]
CLMP
[1:0]
Clamp
Circuit
–
–
+
+
MSIP
PED[7:0]
Y Data
VIDEOB
LPF
U Data
V Data
256
240
YSEL ANEN
Fixed (B-Y)
Gain Stage
Fixed (R-Y)
Gain Stage
UGx[10:0]
VGx[10:0]
G/Y Data
B/Cb Data
R/Cr Data
Output
Formatter
CLMP[1:0]
00
01
10
11
Blanking Selection
Internal 240 level
Internal 256 level
External VIDEOB Input
Internal LPF Output
ANT
1-0
00
01
10
11
Magnitude difference
less than 16
less than 12
less than 8
less than 4