參數(shù)資料
型號： TLV986CPFB
廠商： TEXAS INSTRUMENTS INC
元件分類： 模擬信號調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PQFP48
封裝： PLASTIC, TQFP-48
文件頁數(shù)： 16/20頁
文件大?。?/td> 266K
代理商： TLV986CPFB
TLV986
3-V, 10-BIT, 12.5 MSPS, AREA CCD SENSOR PROCESSOR
SLAS228 – JULY 1999
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range,
TA = 25°C, AVDD = DVDD = 3 V, ADCCLK = 12.5 MHz (unlessotherwise noted)
total device
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
AVDD operating current
41
mA
DVDD operation current
6
mA
Device power consumption
140
mW
Power consumption in power–down mode
2
mW
INL
Full channel integral nonlinearity
AVDD =DVDD =2 7 V 3 3 V
±1
±2
LSB
DNL
Full channel differential nonlinearity
AVDD = DVDD = 2.7 V – 3.3V
–1
±0.5
1.5
LSB
No missing code
Assured
Full channel output latency
4.5
CLK
cycles
analog-to-digital converter (ADC)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ADC resolution
10
Bits
Full scale input span
2
VP-P
Conversion rate
12.5
MHz
correlated double sampler (CDS) and programmable gain amplifier (PGA)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CDS and PGA sample rate
12.5
MHz
CDS full scale input span
Single-ended input
1
V
Input capacitance of CDS
4
pF
Minimum PGA gain
0
1
dB
Maximum PGA gain
35
36
37
dB
PGA gain resolution
0.1
dB
PGA programming code resolution
8-bit monotonic gain control
9
Bits
internal digital-to-analog converters (DAC) for offset correction
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DAC resolution
8
Bits
INL
Integral nonlinearity
±0.5
±1.2
LSB
DNL
Differential nonlinearity
±0.5
±0.9
LSB
Output settling time
To 1% accuracy
80
ns
user digital-to-analog converters (DAC)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DAC resolution
8
Bits
INL
Integral nonlinearity
±0.5
±1.2
LSB
DNL
Differential nonlinearity
±0.6
±0.9
LSB
Output voltage range
0
3
V
Output settling time
10 pF external load. Settle to 1 mV.
4
s
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