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參數(shù)資料
| 型號(hào)： | TLV5625D |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN |
| 中文描述： | 2.7 V至5.5 V的低功耗雙8位數(shù)字至模擬轉(zhuǎn)換器與電源向下 |
| 文件頁數(shù)： | 12/15頁 |
| 文件大小： | 194K |
| 代理商： | TLV5625D |
TLV5625
2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG
CONVERTER WITH POWER DOWN
SLAS233A – JULY 1999 – REVISED MARCH 2000
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
examples of operation (continued)
Both outputs are updated on the rising clock edge after D0 from the DAC A data word is sampled.
Set power-down mode:
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X = Don’t care
linearity, offset, and gain error using single ended supplies
When an amplifier is operated from a single supply, the voltage offset can still be either positive or negative. With
a positive offset, the output voltage changes on the first code change. With a negative offset, the output voltage
may not change with the first code, depending on the magnitude of the offset voltage.
The output amplifier attempts to drive the output to a negative voltage. However, because the most negative
supply rail is ground, the output cannot drive below ground and clamps the output at 0 V.
The output voltage then remains at zero until the input code value produces a sufficient positive output voltage
to overcome the negative offset voltage, resulting in the transfer function shown in Figure 13.
DAC Code
Output
Voltage
0 V
Negative
Offset
Figure 13. Effect of Negative Offset (Single Supply)
This offset error, not the linearity error, produces this breakpoint. The transfer function would have followed the
dotted line if the output buffer could drive below the ground rail.
For a DAC, linearity is measured between zero-input code (all inputs 0) and full-scale code (all inputs 1) after
offset and full scale are adjusted out or accounted for in some way. However, single supply operation does not
allow for adjustment when the offset is negative due to the breakpoint in the transfer function. So the linearity
is measured between full-scale code and the lowest code that produces a positive output voltage.
power-supply bypassing and ground management
Printed-circuit boards that use separate analog and digital ground planes offer the best system performance.
Wire-wrap boards do not perform well and should not be used. The two ground planes should be connected
together at the low-impedance power-supply source. The best ground connection may be achieved by
connecting the DAC AGND terminal to the system analog ground plane, making sure that analog ground
currents are well managed and there are negligible voltage drops across the ground plane.
A 0.1-
μ
F ceramic-capacitor bypass should be connected between V
DD
and AGND and mounted with short leads
as close as possible to the device. Use of ferrite beads may further isolate the system analog supply from the
digital power supply.
Figure 14 shows the ground plane layout and bypassing technique.
P
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