參數(shù)資料
型號： TLV320DAC3120IRHBT
廠商： TEXAS INSTRUMENTS INC
元件分類： DAC
英文描述： SERIAL INPUT LOADING, 24-BIT DAC, PQCC32
封裝： 5 X 5 MM, PLASTIC, QFN-32
文件頁數(shù)： 76/110頁
文件大?。?/td> 1230K
代理商： TLV320DAC3120IRHBT
SLAS659 – NOVEMBER 2009
www.ti.com
Page 1 / Register 33: HP Output Drivers POP Removal Settings
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: If power down sequence is activated by device software power down using page 1 / register 46, bit
D7, then power down the DAC simultaneously with the HP and SP amplifiers.
1: If power down sequence is activated by device software power down using page 1 / register 46, bit
D7, then power down DAC only after HP and SP amplifiers are completely powered down. This is to
optimize power-down POP.
D6–D3
R/W
0111
0000: Driver power-on time = 0
μs
0001: Driver power-on time = 15.3
μs
0010: Driver power-on time = 153
μs
0011: Driver power-on time = 1.53 ms
0100: Driver power-on time = 15.3 ms
0101: Driver power-on time = 76.2 ms
0110: Driver power-on time = 153 ms
0111: Driver power-on time = 304 ms
1000: Driver power-on time = 610ms
1001: Driver power-on time = 1.22 s
1010: Driver power-on time = 3.04 s
1011: Driver power-on time = 6.1 s
1100–1111: Reserved. Do not write these sequences to these bits.
NOTE: These values are based on typical oscillator frequency of 8.2 MHz. Scale according to the actual
oscillator frequency.
D2–D1
R/W
11
00: Driver ramp-up step time = 0 ms
01: Driver ramp-up step time = 0.98 ms
10: Driver ramp-up step time = 1.95 ms
11: Driver ramp-up step time = 3.9 ms
NOTE: These values are based on typical oscillator frequency of 8.2 MHz. Scale according to the actual
oscillator frequency.
D0
R/W
0
0: Weakly driven output common-mode voltage is generated from resistor divider of the AVDD supply.
1: Weakly driven output common-mode voltage is generated from band-gap reference.
Page 1 / Register 34: Output Driver PGA Ramp-Down Period Control
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
Reserved. Write only the reset value to this bit.
D6–D4
R/W
000
Speaker Power-Up Wait Time (Duration Based on Using Internal Oscillator)
000: Wait time = 0 ms
001: Wait time = 3.04 ms
010: Wait time = 7.62 ms
011: Wait time = 12.2 ms
100: Wait time = 15.3 ms
101: Wait time = 19.8 ms
110: Wait time = 24.4 ms
111: Wait time = 30.5 ms
NOTE: These values are based on typical oscillator frequency of 8.2 MHz. Scale according to the actual
oscillator frequency.
D3–D0
R/W
0000
Reserved. Write only the reset value to these bits.
Page 1 / Register 35: DAC Output Mixer Routing
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6
R/W
00
00: DAC is not routed anywhere.
01: DAC is routed to the mixer amplifier.
10: DAC is routed directly to the HPOUT driver.
11: Reserved
D5
R/W
0
0: AIN1 input is not routed to the mixer amplifier.
1: AIN1 input is routed to the mixer amplifier.
D4
0
0: AIN2 input is not routed to the mixer amplifier.
1: AIN2 input is routed to the mixer amplifier.
D3–D0
R/W
0000
Reserved
68
REGISTER MAP
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TLV320DAC3120
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV320DAC3120IRHBT 制造商:Texas Instruments 功能描述:D/A Converter (D-A) IC 制造商:Texas Instruments 功能描述:IC, DAC, 32BIT, 192KSPS, QFN-32
TLV320DAC32 制造商:BB 制造商全稱:BB 功能描述:LOW POWER STEREO AUDIO DAC FOR PORTABLE AUDIO/TELEPHONY
TLV320DAC3202 制造商:TI 制造商全稱:Texas Instruments 功能描述:LOW POWER HIGH FIDELITY I2S INPUT HEADSET IC
TLV320DAC3202BYZJR 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Lo Pwr Hi Fidelity I2S Input Headset IC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
TLV320DAC3202CYZJR 功能描述:音頻放大器 Low Pwr Hi Fidelity I2S Input Headset IC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel
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