
www.ti.com
SLAS659 – NOVEMBER 2009
The headset detection block requires AVDD to be powered. The headset-detection feature in the
TLV320DAC3120 is achieved with very low power overhead, requiring less than 20
μA of additional
current from the AVDD supply.
5.6.4.8
Interrupts
Some specific events in the TLV320DAC3120, which may require host-processor intervention, can be
used to trigger interrupts to the host processor. This avoids polling the status-flag registers continuously.
The TLV320DAC3120 has two defined interrupts, INT1 and INT2, that can be configured by programming
page 0 / register 48 and page 0 / register 49. A user can configure interrupts INT1 and INT2 to be
triggered by one or many events, such as:
Headset detection
Button press
DAC DRC signal exceeding threshold
Noise detected by AGC
Overcurrent condition in headphone drivers/speaker drivers
Data overflow in the DAC processing blocks and filters
DC measurement data available
Each of these INT1 and INT2 interrupts can be routed to output pin GPIO1. These interrupt signals can
either be configured as a single pulse or a series of pulses by programming page 0 / register 48, bit D0
and page 0 / register 49, bit D0. If the user configures the interrupts as a series of pulses, the events
trigger the start of pulses that stop when the flag registers in page 0 / register 44, page 0 / register 45, and
page 0 / register 50 are read by the user to determine the cause of the interrupt.
5.6.5
Programming DAC Digital Filter Coefficients
The digital filter coefficients must be programmed through the I2C interface. All digital filtering for the DAC
signal path must be loaded into the RAM before the DAC is powered on. (Note that default ALLPASS filter
coefficients for programmable biquads are located in boot ROM. The boot ROM automatically loads the
default values into the RAM following a hardware reset (toggling the RESET pin) or after a software reset.
After resetting the device, loading boot ROM coefficients into the digital filters requires 100
μs of
programming time. During this time, reading or writing to page 8 through page 15 for updating DAC filter
coefficient values is not permitted. (The DAC should not be powered up until after all of the DAC
configurations have been done by the system microprocessor.)
5.6.6
Updating DAC Digital Filter Coefficients During PLAY
When it is required to update the DAC digital filter coefficients during play, care must be taken to avoid
click and pop noise or even a possible oscillation noise. These artifacts can occur if the DAC coefficients
are updated without following the proper update sequence. The correct sequence is shown in
Figure 5-15.The values for times listed in
Figure 5-15 are conservative and should be used for software purposes.
There is also an adaptive mode, in which DAC coefficients can be updated while the DAC is on. For
Copyright 2009, Texas Instruments Incorporated
APPLICATION INFORMATION
33