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| 型號： | TLV320DAC3120IRHBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 24-BIT DAC, PQCC32 |
| 封裝： | 5 X 5 MM, PLASTIC, QFN-32 |
| 文件頁數(shù)： | 36/110頁 |
| 文件大小： | 1230K |
| 代理商： | TLV320DAC3120IRHBT |
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SLAS659 – NOVEMBER 2009
5.6.4.3
DRC Hold Time
DRC hold time is intended to slow the start of decay for a specified period of time in response to a
decrease in energy level. To minimize audible artifacts, it is recommended to set the DRC hold time to 0
through programming page 0 / register 69, bits D6–D3 = 0000.
5.6.4.4
DRC Attack Rate
When the output of the DAC digital volume control exceeds the programmed DRC threshold, the gain
applied in the DAC digital volume control is progressively reduced to prevent the signal from saturating the
channel. This process of reducing the applied gain is called attack. To avoid audible artifacts, the gain is
reduced slowly with a rate equaling the attack rate, programmable via page 0 / register 70, bits D7–D4.
Attack rates can be programmed from 4-dB gain change per sample period to 1.2207e–5-dB gain change
per sample period.
Attack rates should be programmed such that before the output of the DAC digital volume control can clip,
the input signal should be sufficiently attenuated. High attack rates can cause audible artifacts, and
too-slow attack rates may not be able to prevent the input signal from clipping.
The recommended DRC attack rate value is 1.9531e–4 dB per sample period.
5.6.4.5
DRC Decay Rate
When the DRC detects a reduction in output signal swing beyond the programmed DRC threshold, the
DRC enters a decay state, where the applied gain in the digital-volume control is gradually increased to
programmed values. To avoid audible artifacts, the gain is slowly increased with a rate equal to the decay
rate programmed through page 0 / register 70, bits D3–D0. The decay rates can be programmed from
1.5625e–3 dB per sample period to 4.7683e–7 dB per sample period. If the decay rates are programmed
too high, then sudden gain changes can cause audible artifacts. However, if it is programmed too slow,
then the output may be perceived as too low for a long time after the peak signal has passed.
The recommended Value of DRC attack rate is 2.4414e–5 dB per sample period.
5.6.4.6
Example Setup for DRC
DAC vol gain = 12 dB
Threshold = –24 dB
Hysteresis = 3 dB
Hold time = 0 ms
Attack rate = 1.9531e–4 dB per sample period
Decay rate = 2.4414e–5 dB per sample period
Script
#Go to Page 0 w 30 00 00 #DAC => 12 db gain mono w 30 41 18 #DAC => DRC Enabled, Threshold = -
24 db, Hysteresis = 3 dB w 30 44 7F #DRC Hold = 0 ms, Rate of Changes of Gain = 0.5 dB/Fs' w 30
45 00 #Attack Rate = 1.9531e-4 dB/Frame , DRC Decay Rate =2.4414e-5 dB/Frame w 30 46 B6 #Go to
Page 9 w 30 00 09 #DRC HPF w 30 0E 7F AB 80 55 7F 56 #DRC LPF W 30 14 00 11 00 11 7F DE
5.6.4.7
Headset Detection
The TLV320DAC3120 includes extensive capability to monitor a headphone, microphone, or headset jack,
to determine if a plug has been inserted into the jack, and then determine what type of
headset/headphone is wired to the plug. The device also includes the capability to detect a button press,
even, for example, when starting calls on mobile phones with headsets. Figure 5-14 shows the circuit
configuration to enable this feature.
Copyright 2009, Texas Instruments Incorporated
APPLICATION INFORMATION
31
Product Folder Link(s): TLV320DAC3120
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TLV320DAC3120IRHBT | 制造商:Texas Instruments 功能描述:D/A Converter (D-A) IC 制造商:Texas Instruments 功能描述:IC, DAC, 32BIT, 192KSPS, QFN-32 |
| TLV320DAC32 | 制造商:BB 制造商全稱:BB 功能描述:LOW POWER STEREO AUDIO DAC FOR PORTABLE AUDIO/TELEPHONY |
| TLV320DAC3202 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:LOW POWER HIGH FIDELITY I2S INPUT HEADSET IC |
| TLV320DAC3202BYZJR | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Lo Pwr Hi Fidelity I2S Input Headset IC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC3202CYZJR | 功能描述:音頻放大器 Low Pwr Hi Fidelity I2S Input Headset IC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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