參數資料
型號: TLV320DAC3100IRHBR
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: DAC WITH PROGRAMMABLE PLL, PQCC32
封裝: 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁數: 56/97頁
文件大小: 1134K
代理商: TLV320DAC3100IRHBR
SLAS671 – FEBRUARY 2010
www.ti.com
Electrical Characteristics (continued)
At 25°C, AVDD = HPVDD = IOVDD = 3.3 V, SPKVDD = 3.6 V, DVDD = 1.8 V, fS (audio) = 48 kHz, CODEC_CLKIN = 256 ×
fS, PLL = Off, VOL/MICDET pin disabled (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DAC Lineout (HP Driver in Lineout Mode)
SNR
Signal-to-noise ratio
Measured as idle-channel noise, A-weighted
95
dB
THD
Total harmonic distortion
0-dBFS input, 0-dB gain
–86
dB
THD+N
Total harmonic distortion + noise
0-dBFS input, 0-dB gain
–82
dB
DAC Digital Interpolation Filter Characteristics
See Section 5.5.1.4 for DAC interpolation filter characteristics.
DAC Output to Class-D SPEAKER OUTPUT; Load = 4
(Differential), 50 pF
SPKVDD = 3.6 V, BTL measurement, DAC input = 0 dBFS, CM = 1.8 V, class-D gain = 6 dB,
2.3
THD
≤ –16.5 dB
Output voltage
Vrms
SPKVDD = 3.6 V, BTL measurement, DAC input = –2 dBFS, CM = 1.8 V, class-D gain = 6
2.1
dB, THD
≤ –20 dB
Output, common-mode
SPKVDD = 3.6 V, BTL measurement, DAC input = mute, class-D gain = 6 dB
1.8
V
SPKVDD = 3.6 V, BTL measurement, class-D gain = 6 dB, measured as idle-channel noise,
SNR
Signal-to-noise ratio
88
dB
A-weighted (with respect to full-scale output value of 2.3 Vrms)
THD
Total harmonic distortion
SPKVDD = 3.6 V, BTL measurement, DAC input = –6 dBFS, CM = 1.8 V, class-D gain = 6 dB
–65
dB
THD+N
Total harmonic distortion + noise
SPKVDD = 3.6 V, BTL measurement, DAC input = –6 dBFS, CM = 1.8 V, class-D gain = 6 dB
–63
dB
PSRR
Power-supply rejection ratio
SPKVDD = 3.6 V, BTL measurement, ripple on SPKVDD = 200 mVp-p at 1 kHz
–44
dB
Mute attenuation
110
dB
SPKVDD = 3.6 V, BTL measurement, CM = 1.8 V, class-D gain = 18 dB, THD = 10%
1
PO
Maximum output power
SPKVDD = 4.3 V, BTL measurement, CM = 1.8 V, class-D gain = 18 dB, THD = 10%
1.5
W
SPKVDD = 5.5 V, BTL measurement, CM = 1.8 V, class-D gain = 18 dB, THD = 10%
2.5
DAC Output to Class-D Speaker Output; Load = 8
(Differential), 50 pF
SPKVDD = 3.6 V, BTL measurement, DAC input = 0 dBFS, CM = 1.8 V, class-D gain = 6 dB,
2.2
THD
≤ –16.5 dB
Output voltage
Vrms
SPKVDD = 3.6 V, BTL measurement, DAC input = –2 dBFS, CM = 1.8 V, class-D gain = 6
2.1
dB, THD
≤ –20 dB
Output, common-mode
SPKVDD = 3.6 V, BTL measurement, DAC input = mute, class-D gain = 6 dB
1.8
V
SPKVDD = 3.6 V, BTL measurement, class-D gain = 6 dB, measured as idle-channel noise,
SNR
Signal-to-noise ratio
87
dB
A-weighted (with respect to full-scale output value of 2.2 Vrms)
THD
Total harmonic distortion
SPKVDD = 3.6 V, BTL measurement, DAC input = –6 dBFS, CM = 1.8 V, class-D gain = 6 dB
–67
dB
THD+N
Total harmonic distortion + noise
SPKVDD = 3.6 V, BTL measurement, DAC input = –6 dBFS, CM = 1.8 V, class-D gain = 6 dB
–66
dB
PSRR
Power-supply rejection ratio
(1)
SPKVDD = 3.6 V, BTL measurement, ripple on SPKVDD = 200 mVp-p at 1 kHz
–44
dB
Mute attenuation
110
dB
SPKVDD = 3.6 V, BTL measurement, CM = 1.8 V, class-D gain = 18 dB, THD = 10%
0.7
PO
Maximum output power
SPKVDD = 4.3 V, BTL measurement, CM = 1.8 V, class-D gain = 18 dB, THD = 10%
1
W
SPKVDD = 5.5 V, BTL measurement, CM = 1.8 V, class-D gain = 18 dB, THD = 10%
1.6
Output-stage leakage current for
SPKVDD = 4.3 V, device is powered down (power-up-reset condition)
80
nA
direct battery connection
DAC POWER CONSUMPTION
For DAC power consumption based per selected processing block, see Section 5.3.
DIGITAL INPUT/OUTPUT
Logic family
CMOS
0.7 ×
IIH = 5 mA, IOVDD ≥ 1.6 V
IOVDD
VIH
V
IIH = 5 mA, IOVDD < 1.6 V
IOVDD
0.3 ×
IIL = 5 mA, IOVDD ≥ 1.6 V
–0.3
IOVDD
VIL
V
Logic level
IIL = 5 mA, IOVDD < 1.6 V
0
0.8 ×
VOH
IOH = two TTL loads
V
IOVDD
0.1 ×
VOL
IOL = two TTL loads
V
IOVDD
Capacitive load
10
pF
(1)
DAC to speaker-out PSRR is a differential measurement calculated as PSRR = 20 × log(
ΔVSPK(P + M) / ΔVSPKVDD) .
6
ELECTRICAL SPECIFICATIONS
Copyright 2010, Texas Instruments Incorporated
Product Folder Link(s): TLV320DAC3100
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