z*1 32768 * D1 z*1
參數(shù)資料
型號: TLV320AIC31IRHBTG4
廠商: Texas Instruments
文件頁數(shù): 22/84頁
文件大?。?/td> 0K
描述: IC STEREO AUDIO CODEC LP 32-VQFN
標(biāo)準(zhǔn)包裝: 250
類型: 立體聲音頻
數(shù)據(jù)接口: PCM 音頻接口
分辨率(位): 24 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
S/N 比,標(biāo)準(zhǔn) ADC / DAC (db): 92 / 100
動(dòng)態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 92 / 100
電壓 - 電源,模擬: 2.7 V ~ 3.6 V
電壓 - 電源,數(shù)字: 1.65 V ~ 1.95 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 帶卷 (TR)
配用: 296-19476-ND - KIT EVAL/DEMO FOR TLV320AIC31
296-19475-ND - MODULE EVAL FOR TLV320AIC31
DIGITAL AUDIO PROCESSING
H(z) +
N0 ) N1
z*1
32768 * D1
z*1
(1)
N0 ) 2
N1
z*1 ) N2
z*2
32768 * 2
D1
z*1 * D2
z*2
N3 ) 2
N4
z*1 ) N5
z*2
32768 * 2
D4
z*1 * D5
z*2
(2)
LB1
LB2
RB1
RB2
www.ti.com ............................................................................................................................................. SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008
The DAC channel consists of optional filters for de-emphasis and bass/treble/midrange level adjustment, speaker
equalization, and 3D effects processing. The de-emphasis function is implemented by a programmable digital
filter block with fully programmable coefficients (see Page-1/Reg-21 through Page-1/Reg-26 for left channel,
Page-1/Reg-47 through Page-1/Reg-52 for right channel). If de-emphasis is not required in a particular
application, this programmable filter block can be used for some other purpose. The de-emphasis filter transfer
function is given by Equation 1:
where the N0, N1, and D1 coefficients are fully programmable individually for each channel. The coefficients that
should be loaded to implement standard de-emphasis filters are given in Table 2.
Table 2. De-Emphasis Coefficients for Common Audio Sampling Rates
SAMPLING FREQUENCY
N0
N1
D1
32-kHz
16950
–1220
17037
44.1-kHz
15091
–2877
20555
48-kHz(1)
14677
–3283
21374
(1)
Default de-emphasis coefficients
xx
In addition to the de-emphasis filter block, the DAC digital effects processing includes a fourth order digital IIR
filter with programmable coefficients (one set per channel). This filter is implemented as cascade of two biquad
sections with frequency response given by Equation 2:
The N and D coefficients are fully programmable, and the entire filter can be enabled or bypassed. The structure
of the filtering when configured for independent channel processing is shown below in Figure 25, with LB1
corresponding to the first left-channel biquad filter using coefficients N0, N1, N2, D1, and D2. LB2 similarly
corresponds to the second left-channel biquad filter using coefficients N3, N4, N5, D4, and D5. The RB1 and
RB2 filters refer to the first and second right-channel biquad filters, respectively.
Figure 25. Structure of the Digital Effects Processing for Independent Channel Processing
Copyright 2006–2008, Texas Instruments Incorporated
29
Product Folder Link(s): TLV320AIC31
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