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參數(shù)資料
| 型號： | TLC34076M-135 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Color-Palette(135MHz,與TLC34075兼容，另具24位和16位真彩色模式) |
| 中文描述： | 顏色調(diào)色板（135MHz，與TLC34075兼容，另具24位和16位真彩色模式） |
| 文件頁數(shù)： | 17/57頁 |
| 文件大?。?/td> | 456K |
| 代理商： | TLC34076M-135 |
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2–1
2 Detailed Description
2.1
MPU Interface
The processor interface is controlled via read and write strobes (RD, WR), four register selects (RS<0:3>),
and 8/6. 8/6 is used to select between 8- and 6-bit operation and is provided in order to maintain compatibility
with the IMSG176/8 color palette. This operation is carried out in order to utilize the maximum range of the
DACs.
The internal register map is shown in Table 2–1. The MPU interface operates asynchronously with data
transfers being synchronized by internal logic. All the register locations support read and write operations.
Table 2–1. Internal Register Map
RS3
L
RS2
L
RS1
L
RS0
L
REGISTER ADDRESSED BY MPU
Palette-address register – write mode
L
L
L
H
Color-palette holding register
L
L
H
L
Pixel read mask
L
L
H
H
Palette-address register – read mode
L
H
L
L
Reserved
L
H
L
H
Reserved
L
H
H
L
Reserved
L
H
H
H
Reserved
H
L
L
L
General-control register
H
L
L
H
Input-clock-selection register
H
L
H
L
Output-clock-selection register
H
L
H
H
Multiplex-control register
H
H
L
L
Palette-page register
H
H
L
H
Reserved
H
H
H
L
Test register
H
H
H
H
Reset state
2.2
The color-palette RAM is addressed by two internal 8-bit registers, one for reading from the RAM and one
for writing to the RAM. These registers are automatically incremented following a RAM transfer, allowing
the entire palette to be read/written with only one access of the address register. When the address register
increments beyond the last location in RAM, it is reset to the first location (address 0). Although all read and
write accesses to the RAM are asynchronous to SCLK, VCLK, and the dot clock, they are performed within
one dot clock and so do not cause any noticeable disturbance on the display.
Color-Palette RAM
The color-palette RAM is 24 bits wide for each location (8 bits each for red, green, and blue). If 6-bit mode
is chosen (8/6 = low), the two MSBs are still written to the color-palette RAM. However, if they are read back
in the 6-bit mode, the two MSBs are set to 0 to maintain compatibility with the IMSG176/8 and Bt476/8 color
palettes. The output multiplexer shifts the six LSBs to the six MSB positions, fills the two LSBs with 0s, then
feeds the eight bits to the DAC. With the 8/6 pin held low, data on the lowest six bits of the data bus are
internally shifted up by two bits to occupy the upper six bits at the output multiplexer, and the bottom two
bits are then zeroed. The test register and the ones accumulation register both take data before the output
multiplexer to give the user the maximum flexibility.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TLC34077 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette Data Manual |
| TLC34077135FN | 制造商:TI 功能描述:* |
| TLC352 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:LinCMOSE DUAL DIFFERENTIAL COMPARATOR |
| TLC352CD | 功能描述:校驗器 IC Dual Differential RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類型: 通道數(shù)量: 輸出類型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應時間: 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel |
| TLC352CDG4 | 功能描述:校驗器 IC Dual Low Vltg LinCMOS Differential RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類型: 通道數(shù)量: 輸出類型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應時間: 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel |
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