參數(shù)資料
型號: tlc320ad56c
廠商: Texas Instruments, Inc.
英文描述: Sigma-Delta Analog Interface Circuit(Sigma-Delta 模擬接口電路)
中文描述: sigma - delta模擬接口電路(Σ-Δ模擬接口電路)
文件頁數(shù): 19/38頁
文件大?。?/td> 253K
代理商: TLC320AD56C
3–2
Figure 3–1 shows the timing relationship for SCLK, FS, DOUT and DIN in a primary communication. The
timing sequence for this operation is as follows:
1.
FS is brought low by the TLC320AD56C.
2.
One 16-bit word is transmitted from the ADC (DOUT) and one 16-bit word is received for the DAC
(DIN).
3.
FS is brought high by the TLC320AD56C signaling the end of the conversion.
D15
D14
...D2
D1
tdis
SCLK
FS
tsu
td1
ten
D0
D15
MSB
D14
...D2
D1
th
D0
LSB
DIN
DOUT
In 16-Bit Mode:
tsu
D15
D14
...D2
D1
th
FC
DIN
In 16-Bit Mode:
MSB
LSB
MCLK
0th
1st
2nd
14th
15th
16th
VIH
VIL
VOH
VOL
VOH
VOL
Figure 3–1. Primary Serial Communication Timing
When a secondary request is made through the LSB of the DAC data word (16-bit mode), the format in
Table 3–1 is used.
Table 3–1. Secondary Request Format
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
15-bit DAC
2’s-complement format
16-bit ADC
2’s-complement format
control
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